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What is the difference between a ceramic capacitor of the same dielectric, but different voltage rating?

Would the lower voltage one have lower ESR or ESL?

For example,

X7R 10uF 4V

as compared to a

X7R 10uF 10V

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ESL is almost entirely determined by lead inductance, so the size and type of the package determine this value.

ESR is a function of many things, but one of them is dielectric thickness, as thickness increases so does ESR.

Voltage rating is a function of dielectric strength and thickness.

So, if a package size is fixed, say both 0805, you should expect the same or extremely close ESL, while the dielectric strength or thickness would need to have increased to increase the voltage rating, so ESR would be higher.

This isn't a firm rule, remember that ESR varies with frequency.

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I respectfully disagree with Mark on point, that ESR will vary for the same material when thickness is different. If capacitance is the same and ESR is mainly defined by properites if dielectric, then with doubling of dielectric thickness, the area will be also doubled to maintain same capacitance.

I'd also guess that ESR is mostly function of conductor plate material, its surface and geometry. Why I am so certain, is because ESR is highly frequency dependent. Capacitance is much less dependent on frequency. So ESR on higher frequencies can be blamed on skin effect.

Answer is no. Can not expect change in ESR, ESL

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    \$\begingroup\$ ESR is the sum of Rsd (dielectric loses) and Rsm (loses in the contact metals), Which one is "most" is frequency dependent, under 1Mhz Rsd is generally dominant, over ~250Mhz or so, Rsm is dominant. The actual calculation of Rsm or Rsd involves a lot of factors of construction, as I said only one of them is the thickness of dielectric, however it still holds that increasing dielectric thickness will increase ESR, how much or if its even meaningful is entirely frequency dependent. \$\endgroup\$ – Mark Nov 7 '10 at 6:30
  • \$\begingroup\$ Yes. and yes. With thickness increase the ERS increases, Agree. But to maintain same capacitance value you add area (effectively putting more of thick capacitors in parallel). And. It negates the ESR increase to exactly same vlaue you started with when dielectric was thin. \$\endgroup\$ – user924 Nov 7 '10 at 19:26
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It's sometimes useful to think of capacitors and batteries as containing charge-storing 'stuff' and charge-carrying 'stuff'. The material on the surface of each electrode and the dielectric between electrodes work together to hold charge, but are not very effective at moving it around. The metal interior of each electrode is very effective at moving charge around, but practically useless for holding it. Some capacitors and batteries are constructed with a lot of metal inside the electrodes, so that charge can be exchanged with any part of the storage surface with minimal resistance. Others are designed with a lot less metal. Reducing the amount of metal in a given volume will make more space available for charge-storing surfaces, but it will also increase the effective resistance between those surfaces and the external terminals of the device.

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Ceramic capacitors close to their maximum voltage rating lose capacitance. A 6.3V cap may have up to 60% lost in capacitance at the full rated voltage and over the full temperature and tolerance range. Depending on your application, this could cause a lot of intermittent problems.

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  • \$\begingroup\$ Yes, it's old, but... I believe that is only for the Class 2's(X7, X5, Y5, etc). This should not apply to a C0G ceramic, which by definition have little change over voltage or temperature. \$\endgroup\$ – GB - AE7OO Oct 12 '19 at 20:47

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