I'm designing an AC-coupled low-noise preamplifier that will likely use parallel JFETs as the first amplifier stage.
One of the things I'd like to measure is the noise of very quiet regulators. JFETs are susceptible to damage from forward gate-source voltages. Additionally, to get the best noise performance out of the JFETs, I'd like to operate them at 0 gate-source bias.
Therefore, I'm designing a protection circuit to keep this voltage within safe limits (needed, for example, when the power supply is turned on or attached to the preamplifier).
My question is: what's the maximum safe gate-source voltage these JFETs can be exposed to and still ensure long-term device reliability?
Let's take the CPH3910 as an example. The datasheet specifies 10 mA gate current max. I ran a spice simulation using the manufacturer-provided device model and found the following relationship between IGS and VGS (solid line is 27C, dashed is 100C).
It's not really discernible in the plot, but 10 mA occurs at about 0.73 V. Since I'm basically modelling just a PN junction, and the IV curve follows an exponential, small decreases in the applied voltage produce large decreases in the current. Is limiting the gate current to around 1 μA safe?
To what extent can the JFET survive short deviations at higher gate currents? My present plan for the protection circuit is to use a comparator and load switch (MOSFET), which will, of course, have a non-zero turn-on time. I'll probably add a BAV99 after that for additional protection.
How do I assess what sort of short-term higher gate currents are safe?
FYI I'll measure the actual IV characteristic of the JFET with a curve tracer to ensure the Spice model is accurate before I construct the circuit.
Also, I expect some people will be tempted to point out that BJTs do better than JFETs in amplifying noise from a low-impedance source such as a power supply. I'll probably explore building another circuit using BJTs in the future, but for the meantime I'm sticking with JFETs. One reason for this is I'd like this to work with higher-impedance sources too and the performance of JFETs should be adequate for even the quietest regulators.
I updated the plot to show the IV curve at 100C, since someone pointed out this relationship is highly temperature-dependent.
I'm adding a plot comparing the IV characteristic of a BAV99 and CPH3910, which should be helpful in determining how much current the BAV99 steals from CPH3910.
And, in the following I've added a 10ohm resistor to the CPH3910 gate. Helps a bit, but maybe not enough.