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I have recently created a project in ADS. It contains a couple of transmission lines, capacitors, and resistors. When I connect my transmission lines to the s2p file, transient simulation is done successfully. But, when I connect the large-signal model to transmission lines, a time step error is shown after about 120 ps. My component is an RF IC produced by NXP company. simulation models can be downloaded from the following link:

https://www.nxp.com/products/radio-frequency/rf-aerospace-and-defense/avionics/978-1090-mhz-250-w-peak-50-v-airfast-rf-ldmos-wideband-integrated-amplifiers:AFIC10275N?fpsp=1#documentation

the large-signal model does not have any incompatibility with transient simulation, because I have done the simulation simulation on this ( without any other component, wire , transmission line and etc). My RF fundamental frequency is 1090 MHz. Also, I did s-parameter simulation on it successfully.

In order to solve the timestep error, I have taken the following measures:

-I have placed a 1e-6 pF capacitor at every node

-I have connected DC voltage supply to the IC with an intermediary 10 ohm resistor

-I have changed the "time step" parameter over a wide range from 0.01 ps to 100 ps

-I have enabled (or disabled) the "limit time step for transmission line" checkbox

-I have used different convolution tolerances (specially "strict" mode) and time step control methods

Here is the schematic:

enter image description here

I tried to upload my code, but its size was too much (even higher than 1 Gb).

The error message is represented in the following:

    Simulation Messages

Warning detected by hpeesofsim during netlist flattening.
    Inductor `FET2FSL1.X1.L1' L=-9e-11 is negative.
Warning detected by hpeesofsim during netlist flattening.
    Inductor `FET2FSL1.X2.L1' L=-9e-11 is negative.
Warning detected by hpeesofsim during netlist flattening.
    Inductor `FET2FSL1.X3.L1' L=-4e-11 is negative.
Warning detected by hpeesofsim during netlist flattening.
    Inductor `FET2FSL1.X3.L2' L=-4e-11 is negative.
Warning detected by hpeesofsim during netlist flattening.
    Inductor `FET2FSL1.X4.L1' L=-4e-11 is negative.
Warning detected by hpeesofsim during netlist flattening.
    Inductor `FET2FSL1.X4.L2' L=-4e-11 is negative.
Warning detected by hpeesofsim during circuit set up.
    Mutual inductor `FET2FSL1.X4.Q2.Mutual1' has an unphysical mutual inductance M=-7.061e-13.
    L1=0.000e+00 L2=0.000e+00; limit for M is +/-0.000e+00.
Warning detected by hpeesofsim during circuit set up.
    Mutual inductor `FET2FSL1.X4.Q1.Mutual1' has an unphysical mutual inductance M=-7.061e-13.
    L1=0.000e+00 L2=0.000e+00; limit for M is +/-0.000e+00.
Warning detected by hpeesofsim during circuit set up.
    Mutual inductor `FET2FSL1.X3.Q2.Mutual1' has an unphysical mutual inductance M=-7.061e-13.
    L1=0.000e+00 L2=0.000e+00; limit for M is +/-0.000e+00.
Warning detected by hpeesofsim during circuit set up.
    Mutual inductor `FET2FSL1.X3.Q1.Mutual1' has an unphysical mutual inductance M=-7.061e-13.
    L1=0.000e+00 L2=0.000e+00; limit for M is +/-0.000e+00.
Warning detected by hpeesofsim in topology check during circuit set up.
    Number of nodes with only one device attached (topology corrected): 1
Warning detected by hpeesofsim during TRAN analysis `Tran2'.
    Component `FET2FSL1.X4.SNP1.CMP1':
       ImpMaxFreq is reduced to highest data frequency at 8.000000e+09 Hz. 
Warning detected by hpeesofsim during TRAN analysis `Tran2'.
    COMPONENT `FET2FSL1.X4.SNP1.CMP1':
       Highest frequency in data is 8e+09 Hz, which is smaller than the maximum source bandwidth 8.72e+09 Hz.
Warning detected by hpeesofsim during TRAN analysis `Tran2'.
    Component `FET2FSL1.X3.SNP1.CMP1':
       ImpMaxFreq is reduced to highest data frequency at 8.000000e+09 Hz. 
Warning detected by hpeesofsim during TRAN analysis `Tran2'.
    COMPONENT `FET2FSL1.X3.SNP1.CMP1':
       Highest frequency in data is 8e+09 Hz, which is smaller than the maximum source bandwidth 8.72e+09 Hz.
Warning detected by hpeesofsim during TRAN analysis `Tran2'.
    Component `FET2FSL1.SNP3.CMP1':
       ImpMaxFreq is reduced to highest data frequency at 8.000000e+09 Hz. 
Warning detected by hpeesofsim during TRAN analysis `Tran2'.
    COMPONENT `FET2FSL1.SNP3.CMP1':
       Highest frequency in data is 8e+09 Hz, which is smaller than the maximum source bandwidth 8.72e+09 Hz.
Warning detected by hpeesofsim during TRAN analysis `Tran2'.
    Component `FET2FSL1.X2.SNP1.CMP1':
       ImpMaxFreq is reduced to highest data frequency at 8.000000e+09 Hz. 
Warning detected by hpeesofsim during TRAN analysis `Tran2'.
    COMPONENT `FET2FSL1.X2.SNP1.CMP1':
       Highest frequency in data is 8e+09 Hz, which is smaller than the maximum source bandwidth 8.72e+09 Hz.
Warning detected by hpeesofsim during TRAN analysis `Tran2'.
    Component `FET2FSL1.SNP2.CMP1':
       ImpMaxFreq is reduced to highest data frequency at 8.000000e+09 Hz. 
Error detected by hpeesofsim during TRAN analysis `Tran2'.
    Internal timestep 9.58155e-16 too small at time 1.44486e-10.

I have been thinking on solving this error for more than 2 weeks ,and I do not know how to solve this. It would be great if you can give me a couple of suggestions.

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  • \$\begingroup\$ Please give recommendations even if you have faced this error in other similar software. \$\endgroup\$ Aug 8 at 3:45

1 Answer 1

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Lots of errors in there, so taking it one at a time:

Looks like "maximum source bandwidth" is 8.72GHz, but ImpMaxFreq is limited to only 8GHz. You can bump that by clicking on Transient -> Convolution -> Advanced -> Max Frequency (9GHz?).

Changing ImpMaxFreq

But really, the most worrisome messages are about the negative inductances in X[123].L[12]. Have a read through the FET2FSL model to understand how those are derived, and maybe that'll let you modify some inputs to make them realistic. Sample model location for an NXP component:

C:\Program Files\Keysight\ADS2021\custom\MRFE6VP5150N_Level1_Rev0_DK\circuit\models\fsl_MRFE6VP5150N_pkg_netlists.net

The "Mutual1" errors are what I was just looking into for my own sim, and it looks like NXP defined a 0.0 coupling factor, so the mutual inductance is indeed unrealistic.

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