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Looking over the following Verilog CPU description, I have a question about how you would actually go about executing an assembly program on it.

I know that Verilog defines the behaviour of the hardware, not the actual implementation. My question is: would I need to actually build this CPU or could I somehow run an assembly program on the CPU using the Verilog design?

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    \$\begingroup\$ Not sure what you're asking. If you want to run the code on hardware, you have to build the hardware. But it is also possible to run your code in a simulation of the hardware. I have done this in several cases in which the simulated CPU is part of the testbench for another module that I have developed. \$\endgroup\$
    – Dave Tweed
    Commented Aug 10, 2022 at 15:12
  • \$\begingroup\$ would I need to actually build this CPU or could I somehow run an assembly program on the CPU using the Verilog design - you could use FPGA or some kind of simulation suit (will be very slow). \$\endgroup\$
    – Eugene Sh.
    Commented Aug 10, 2022 at 15:12
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    \$\begingroup\$ Verilog can be "automatically built" onto an FPGA, and then you have an FPGA which is the CPU. No need to worry about building one by hand. \$\endgroup\$ Commented Aug 10, 2022 at 17:29
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    \$\begingroup\$ So the question is really how to feed an assembly program into the CPU. IDK this one, but most educational CPUs will expect to have a ROM chip wirede up, with the program being stored in the ROM. You could wire up a ROM chip if you really wanted, but it's much more convenient can put the ROM inside the FPGA too. Probably the Verilog code allows for this possibility. \$\endgroup\$ Commented Aug 10, 2022 at 17:30
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    \$\begingroup\$ (If you don't have an FPGA, you can also simulate Verilog on a computer, of course) \$\endgroup\$ Commented Aug 10, 2022 at 17:30

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This project gives you several choices.

The project provides python scripts to convert assembly language to a hex file, and an interpreter/emulator that reads the hex file and executes it.

You can take that same hex file and load it into a memory in your Verilog simulation and it will execute on the simulated RTL.

And finally you can synthesize the RTL onto an FPGA, load the hex file into a memory on the FPGA and execute directly on the hardware.

Unfortunately this abandoned project does not have much documentation, you will have to read a lot of the code to know how to perform all the steps.

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  • \$\begingroup\$ What project? I don't see any links to a project... \$\endgroup\$ Commented May 31 at 2:51
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    \$\begingroup\$ The link in the original post: Verilog CPU description \$\endgroup\$
    – dave_59
    Commented May 31 at 3:27
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The CPU in your link is a soft CPU, from an FPGA/CPLD perspective. The Verilog HDL source files carry the digital logic circuit design for the CPU.

The CPU is just one part of a microprocessor, which is just one part of a microprocessor system. So you'd need more HDL that carries all of that digital logic circuit. That can be simulated, debugged, then synthesized to produce a configuration file for an FPGA. You may find that on the Internet, already done by someone - that'd be something for you to track down yourself.

Once that's in an FPGA, you could then write assembly language programs or compile an HLL for it, depending on the software tools available.

The Verilog could target an ASIC but I imagine that's well beyond what's available to you.

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  • \$\begingroup\$ Are "CPU" and "microprocessor" not synonyms? (excluding mini- and megaprocessors :) \$\endgroup\$ Commented Aug 10, 2022 at 17:31
  • \$\begingroup\$ Hi @user253751, a Central Processing Unit (CPU) actually runs the programs so it has fetch/execute, instruction decoding, registers etc. A microprocessor (MPU) is a single IC with a CPU and possibly cache RAM that uses its pins to connect to internal memory/IO buses, so it has a bus interface unit, any memory controllers, PCIe etc. A microcontroller (MCU) is a CPU, on-chip program/data memory with its pins for user I/O functions that is self-contained except clock oscillator. There are plenty of exceptions to these MPU and MCU descriptions but they're broadly there. The CPU is just one part. \$\endgroup\$
    – TonyM
    Commented Aug 11, 2022 at 11:15

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