3
\$\begingroup\$

Introduction

I am developing a PCB which has a 12VDC unregulated power supply connected to an LVR L7805CV from which a couple of shift registers (74HCT595) are being powered. The problem I have is that when I probe the main line (230VAC) connections with a multimeter to measure voltage, the shift registers change outputs due to noise. This happens every time on an initial touch with a probe, however the noise is gone once contact has been established with the probe.

I assume that my multimeter acts as an antenna that introduces noise into the circuit, however I've been unable to fix this issue.

Some might say, well don't touch it with a multimeter, however I believe the problem is much more intrinsic. I believe that the same issue will occur if a high load noisy equipment is connected on the same ac line as my PCB.

Circuit

The circuit is little bit more complicated than I described above. I basically have a transformer stepping down from 230VAC to 18VAC with split secondaries from which I obtain 24VDC and 12 VDC accordingly. I put a an X class capacitor C5 to filter any possible noise coming from the main line. I also put pretty bulky smoothing capacitors to avoid high ripple. The LVR is loaded at 100mA max. and the transformer is loaded at 550mA max. enter image description here

Design layout

I separated the board into high(230VAC) and low voltage zones separated by a minimum of 8mm distance, optocouplers, relays or main transformer. I designed the LVR according to datasheet, putting capacitors C1, C2 and C3 as close as possible. I didn't put a ground plane in the low voltage zone because I thought I didn't need one due to low frequency signals. All ground traces are branching out from a single point of the circuit preventing ground loops. All power lines were put close to each other on separate layers in order to avoid any radiated noise from the board. enter image description here

The main problem

Probing when PCB is not powered

Whenever I connect the probe, I can see peaks on the input and output from the LVR going up to ~800mV. Please note that both images were not shot concurrently.

enter image description here enter image description here

Probing when PCB is powered

Unlike previously, when PCB is powered the peaks go much higher with values up to ~10-15V. I believe that due to this high noise in the 5VDC power supply my shift registers change outputs. Please note that both images were not shot concurrently

enter image description here enter image description here

Question

I am unable to address the problem since I don't know what is the reason that causes it. Is this an issue due to resonance in the circuit, is it an EMC issue, is it a poor design layout or maybe something else? I would really be grateful if you could help me come to a solution to this problem or perhaps suggest literature.

What has already been tried

  • At first I thought that the multimeter was faulty drawing too much current and causing voltage drop. I tried another multimeter and the problem persisted.
  • I was missing some decoupling capacitors on my shift registers so I added 1 µF (0805) and 47 nF (0603) in parallel as close as possible to the VCC pin. I thought this was the source of the problem but it didn't help.
  • Then I thought that my LVR was unstable so I added 100 uF electrolytic caps on the input and output. While this reduced the probability of output switching, yet it still occurred occasionally.
  • In order to avoid software or MCU problems I disconnected the MCU completely to isolate the problem. All shift register inputs were connected to ground. Therefore I concluded that my MCU or software was not the problem.
  • I thought that my C5 EMC capacitor was resonating with the transformer's primary. I removed it but the problem persisted so I returned it.
  • I tried putting some series resistors to the shift registers' DATA, LATCH and input pins to mitigate noise, however the problem persisted so I removed them.

Update 1

  • As @ PStechPaul suggested, I tried putting 180k resistor between N and GND to check if it helps. I even tried 10k on a powered off PCB. Nevertheless I could still see the same peaks and the problem persisted
  • Considering the suggestion from @Jens, I also tried testing if any ESD flows from my DMM lead through the transformer by putting 400V breakdown voltage TVS diode between L and N. I also added a ferrite bead in series of L, however the problem persisted and I could still see the same peaks.

The last test, lead me to believe that this transient flows through a different path. Therefore, I completely removed the fuses from the L traces, disabling any conductive path to my PCB components from the L lines. Then I performed the DMM test by touching the L line on a powered off PCB and I could see the same ~500mV peaks as before.

This lead me to a conclusion that I am probably discharging myself when I am touching the PCB and the transient couples capacitively with the whole board. I am not even sure if this can be fixed. I hope if someone could tell me how can I avoid this capacitive coupling interfering with my shift registers

Update 2

  • As @Jens suggested, I tried putting RC filters on input lines with 100 Ω resistor and 100 nF capacitor. I could see the signals clean on scope, however registers still went haywire when touching with my multimeter.

This led me to conclusion that I have an intrinsic design problem with my board and therefore I'd like to finalize this post with your recommendations (answers) on design improvements that may help reduce the shift register noise.

I believe that one of the main problems with the shift registers is noise and bad decoupling. Here are my thoughts on this:

  1. I would introduce a ground plane in the LV zone in order to avoid all the ground traces being led throughout the board.
  2. I would add schmitt triggers in front of each input line.
  3. I would add RC filters in front of data, latch and clk signals before each schmitt trigger input. R=100 Ω and C=100 nF.
  4. Current shift registers were powered from 5V and driven with 3v3 signals. Hence the TTL version 74HCT. Since ULN2003 from TI can be driven with 3V3 signals, I decided to replace the shift registers with the CMOS version and power it from 3V3 in order to increase noise margin.
  5. I had considered using I/O expander instead of shift registers, however the I2C signals would go through ~70 cm (23 inches) flex ribbon cable therefore I ruled it off in order to avoid potential problems with I2C due to cable capacitance.
  6. Of course the missing decoupling capacitors I had to add afterwards will be added as well. I was planning on putting 100 nF (0603) and 1 uF (0805) ceramic ones.

What is your opinion on this and what else would you add?

\$\endgroup\$
25
  • 2
    \$\begingroup\$ Don’t use an earth symbol on Neutral! The problem is most likely to be in the part of the circuit you haven’t shown us. \$\endgroup\$
    – Kartman
    Aug 12, 2022 at 22:59
  • 1
    \$\begingroup\$ This looks like a static ESD discharge. Do you have a carpet that charges yourself while walking on it? Do not connect any of the HV lines to GND as shown in the circuit, this is evil. Does your LV side have an earth connection? Where is the other multimeter probe connected when you watch this impact? \$\endgroup\$
    – Jens
    Aug 13, 2022 at 1:09
  • 1
    \$\begingroup\$ Transformers and optos have capacitance - fast transients can be coupled via this. Transients always have a way of finding their way back to earth. Sometimes the path isn’t what you expect. If your electronics get in the way, then you have problems. \$\endgroup\$
    – Kartman
    Aug 13, 2022 at 2:54
  • 1
    \$\begingroup\$ Are you connecting the DMM negative lead to AC neutral as shown in your sketch? There is often substantial voltage from N to GND. And if your circuit is floating, it will assume a capacitively coupled potential, and the DMM will cause a momentary spike and some residual AC noise. It may help to add a 100-200k resistor from neutral to circuit GND. Also make sure your logic circuits have proper bypass capacitors on power rails. \$\endgroup\$
    – PStechPaul
    Aug 13, 2022 at 3:17
  • 1
    \$\begingroup\$ The rectifier arrangement is really weird. Can you probe the 12V rail? \$\endgroup\$
    – bobflux
    Aug 13, 2022 at 23:56

2 Answers 2

1
\$\begingroup\$

The problem is a common mode voltage coupling through the transformer's inter-winding capacitance.

  1. There is no earth connection to the PCB. This makes balance to ground challenging. The easiest solution is to connect circuit common to earth power ground.
  2. The electrolytic capacitors must be bypassed with 0.1 to 1.0 uF ceramic capacitors. At the ringing frequency of the spike the electrolytics look like open circuits.
  3. Putting a small resistor in series with the center tap will also help to low pass filter the line to the LDO.
  4. Place a common mode choke between the mains input and C5. This may solve the problem if a 3-wire mains is not available or the system is to be floating.
  5. Ground bounce is a common source for these problems. Be certain the your pcb routing keeps the regulated and unregulated return paths separate connecting them together at the junction of C1 and C4 only. Decoupling capacitors will not reduce the effects of ground bounce.

I still standby my other answer as a better solution, but I would also include some of these measures there.

\$\endgroup\$
1
  • \$\begingroup\$ You are spot on with all the points you've mentioned. I would reconsider the first one. Connecting my scope to the PCB actually worsened the problem due the scope's ground lead being connected to earth. I believe the reason is because this way the common mode noise has path of flow making it easier to cause voltage drops on the main load in the PCB. Without earth connection, the impedance to earth is too high and therefore voltage drop on the main load is much lower. At least this is my conjecture, you might have a better explanation. \$\endgroup\$
    – Phill Donn
    Aug 18, 2022 at 21:49
1
\$\begingroup\$

I suggest that the noise is capacitively coupling through the inter winding capacitance. The "split supply" circuit is more commonly used for +V and -V with the centre tap as common. This provides balanced impedance from each primary wire to common. Your circuit is used to two positive voltages with a common that is not connected to the transformer in any way. If as you say this method is commonly used then those circuits probably have the same problem that you are encountering. The following circuit will provide a more balanced impedance to the primary

schematic

simulate this circuit – Schematic created using CircuitLab

Capacitors C1 and C2 are to smooth the rectified ac. Capacitor C3 is necessary to decouple load transients from appearing at the input to the regulator. All three should be paralleled with 0.1 to 1 uF ceramics. Since the problem is Electrostatic Discharge this can only be a suggestion.

Regulator stability and protection components omitted for clarity.

When I have time I will build and test myself.

\$\endgroup\$
3
  • \$\begingroup\$ Your suggestion makes a lot of sense. I will test it as soon as I have the necessary components. Do you think anything would change, impedance related, if there was only one primary instead of two on the transformer? How would one calculate the size of C3, could you suggest a link or literature? I would've thought that 0.1 and 1uf was enough for transients. \$\endgroup\$
    – Phill Donn
    Aug 17, 2022 at 12:10
  • 1
    \$\begingroup\$ @ Phill Donn: No difference. I didn't find a single primary symbol so I made this one. Single primary is ok. \$\endgroup\$
    – RussellH
    Aug 17, 2022 at 17:03
  • 1
    \$\begingroup\$ @PhillDonn: The ceramic that is paralleled with an electrolytic is used to compensate for the inductive nature of the electrolytic at high frequencies and so these can be small values. C3 is used to provide a current path from ground to the unregulated voltage at high and low frequencies to bypass C2. It does not provide a total bypass but there is headroom on the voltage regulator. I would make C3 equal to the other two. \$\endgroup\$
    – RussellH
    Aug 17, 2022 at 17:14

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge that you have read and understand our privacy policy and code of conduct.

Not the answer you're looking for? Browse other questions tagged or ask your own question.