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I am trying to protect three separate inputs (A0, A1, and A2 with A3 as reference) of an ADC from an over-voltage of ±10V DC between any of the inputs or the reference (the reference is not grounded to earth but is simply operated as another input).

Less commonly a higher voltage may be introduced upwards of 100 V. The ADS1115 ADC is connected to an Arduino and VDD is coming in around 4.8 V to power the ADS1115.

I have some 4.3 V, 5 W zener diodes that I was planning to use as opposing sets between each input of the ADS1115 so a higher voltage between any two inputs is clamped (the "Z" box represents two opposed zeners for bidirectional protection).

I have found that adding any resistors to the inputs influences the readings of the other inputs and the ADS1115 will give errors.

Is there a way to protect the zeners from over-current damage and still protect the ADS1115 inputs at the same time while not throwing off the ADS1115's readings? Perhaps a combination of zeners and fuses are a good option?

Example Circuit

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  • \$\begingroup\$ How long do these "anomalous" events last? \$\endgroup\$ Commented Aug 17, 2022 at 2:59
  • \$\begingroup\$ The 10V can be many seconds at a time, maybe minutes. The 100V input would last a few seconds. While connected to any of these higher voltages I wouldn't expect the ADS1115 to give accurate readings other than displaying the max voltage allowed to the input terminals. \$\endgroup\$
    – Rob
    Commented Aug 17, 2022 at 21:31

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Your inter-input protection scheme is insufficient to protect the ADC. Take the scenario when all inputs except one are at 0V, but one is at 100V. By clamping the voltage difference between each input to a maximum of 5V, what you have is a situation in which each input source is fighting to impose its own idea of what should arrive at the ADC:

schematic

simulate this circuit – Schematic created using CircuitLab

The potential at each ADC input is close to the average of all three, which is way beyond what the ADC will tolerate. It's toast. If you wish to protect the ADC with clamps, I can't see any way other than clamps with respect to ground, not to each other.

Now you have to deal with the extreme sensitivity of this ADC to out-of-range inputs. The datasheet is clear on this, no input should exceed \$V_{DD}+0.3V\$, or drop below \$-0.3V\$. Perhaps it has input protection diodes that impose this condition, but whichever way you look at it, you can't let 100V, or even 10V anywhere near this thing, with or without series current limiting resistors.

There may be simpler ways to approach this that people here can suggest, other than the one I'm about to propose, but the only solution I can think of right now employs op-amps, whose input impedance is so high that current limiting resistors won't be an issue. My proposal requires four op-amps (one for each input channel), with FET inputs, and inputs and outputs that can get very close to 0V. the TLC2274 should do. We rely on the op-amp's rail-to-rail behaviour to get close to (but still not all the way) to 0V. This means you'll sacrifice a few millivolts of range near 0V. Each channel looks like this:

schematic

simulate this circuit

enter image description here

The circuit is physically incapable of producing any output outside of the ADC's acceptable input range, since that constraint is imposed by the op-amp's power supplies.

The two diodes clamp the op-amp's input to between \$V_{DD}-0.3V\$ and \$4V\$, to protect the op-amp.

Resistors R1 and R2 share the bulk of the occasional 100V input between them, so they never get anywhere near their voltage rating. When the input is 100V, the current flowing through R1 and R2 will be limited to about \$\frac{96V}{33k\Omega + 27k\Omega}=1.6mA\$, which all those clamping components will be fine with.

The reason for the resistor potential divider is to bring a +5V input just below the op-amp's acceptable maximum input voltage. The non-inverting amplifier restores the original signal amplitude. The combined attenuation by the resistor divider and gain by the the amplifier is \$0.75 \times 1.33 = 1.0\$.

This circuit will survive ±100V at the input forever, and never output below 0V or above 5V.

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  • \$\begingroup\$ All the inputs would be connected to ground (I'm trying to measure the voltage in soil). Does that makes the clamp circuit still a possibility? Otherwise, the op-amp circuit you outlined seems like an good application. \$\endgroup\$
    – Rob
    Commented Aug 17, 2022 at 21:35
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    \$\begingroup\$ You can't have any input on the ADC lower than the potential at the ADC's GND pin, or greater than the ADC's Vdd pin. You must constrain those inputs relative to the ADC's own idea of what 0V is, which is defined by the potential at its own GND pin. Let me put it like this: you have four dogs that you must keep within 50 feet of a post. Do you chain the dogs to each other? No, they could still escape if they all move together. You must chain them each individually to the post, that post being your ADC's GND pin. \$\endgroup\$ Commented Aug 18, 2022 at 2:07

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