Say I have a 2-bit ADC operating on a range [-2 V, +2 V] to make it easy. After the quantization I have a sequence of values [01, 11, 10]. Do these values represent voltage intervals or specific voltage values?

As far as I understood they represent intervals so [[-1 V, 0 V], [1 V, 2 V], [0 V, 1 V]] but I was watching this explanation (link to example minute) and it confused me a little (since real values are mapped to 5 values rather than 4 intervals). After the ADC inside a microprocessor, how would the corresponding digital signal of my example look?

  • \$\begingroup\$ A two-bit ADC has four possible output states, not three. Does your ADC never allow the [0,0] value? I would suggest that since your input range has symmetry about 0V, the four output values should correspond to two above 0V and the other two below zero volts. Most every practical ADC has \$2^N\$ output values, where N is # of bits. \$\endgroup\$
    – glen_geek
    Aug 18, 2022 at 22:31
  • \$\begingroup\$ What I meant is that for 3 time instants I get the corresponding three values, that's why they're not in order \$\endgroup\$ Aug 18, 2022 at 22:58
  • \$\begingroup\$ You appear to be asking how the thresholds get mapped and that is opinion-based. My opinion is that 00 represents values of below -1 volt and, 01 is from -1 volt to 0 volts. 11 would be values of +1 volt and above (encompassing +2 volts obviously). That's how a commonplace ADC would work. But, it could be also the regimes described in the various answers or different regimes (including non-linear regimes). \$\endgroup\$
    – Andy aka
    Aug 19, 2022 at 9:31

2 Answers 2


n bits = 2

If using a bi-polar converter

 Voltage  Code
 3 1/3         Vref
 2        11   Vmax
 2/3      10 
-2/3      01
-2        00

$$V_{step} = 4/3$$ $$V_{step}= \frac {V_{ref}-V_{min}}{2^n} = \frac {V_{max}-V_{min}}{2^{n-1}}$$

Notice that 0V cannot be measured.

If there is noise greater than 1 LSB for most ADCs, a simple moving average can be applied to extract a zero value.

Many ADCs transition to the next code at the 1/2 LSB mark to improve quantization noise. This also places the desired code at the midpoint of the step-shelf.

See the link in @Transistor's comment.

  • \$\begingroup\$ Any lowpass filter would do the trick. It doesn't have to be a moving average. It could be that; or it could be an exponential average, which could be implemented as subtracting a fraction of the previous result and adding the same fraction of the input; or it could be any number of formal DSP algorithms to produce a lowpass. In fact, the "simple moving average" can be thought of in DSP terms as a Finite Impulse Response (FIR) filter, with all of its coefficients equal. \$\endgroup\$
    – AaronD
    Aug 19, 2022 at 0:29
  • \$\begingroup\$ All digital lowpasses trade away high-frequency amplitude to gain low-frequency resolution. This characteristic is used directly in audio converters, for one example: the actual converter runs in the MHz range with relatively few bits, then the chip lowpasses digitally to both get below Nyquist for the desired output rate and fill in the full resolution, and then it picks samples out at the desired rate (44.1kHz, 48kHz, 96kHz, or whatever) and discards the rest. \$\endgroup\$
    – AaronD
    Aug 19, 2022 at 0:29
  • \$\begingroup\$ (For completeness, the exponential average also has a formal equivalent. It's a 1st-order Infinite Impulse Response (IIR) lowpass.) \$\endgroup\$
    – AaronD
    Aug 19, 2022 at 0:34

If you have a 2-bit unipolar ADC operating on range -2 V, + 2 V then you will have a sequence of values:

00 = -2 V
01 = -1/3 V
10 = +1/3 V
11 = +2 V

You could expect the digital reading to change midway between each point.


simulate this circuit – Schematic created using CircuitLab

Figure 1. A 2-bit ADC with resistor chain, comparators and binary encoding.

  • When AIN < -1.333 V all comparators' outputs will be low.
  • When -1.333 V < AIN < 0 V CMP3 will switch high.
  • When 0 V < AIN < 1.333 V CMP2 will switch high (as well).
  • When 1.333 V < AIN < V1 CMP 1 will switch high (as well).

U1 encodes these as follows:

CMP1 CMP2 CMP3   b1 b0
 0    0    0      0  0
 0    0    1      0  1
 0    1    1      1  0
 1    1    1      1  1
  • \$\begingroup\$ This is wrong.00 represents any input voltage from -2 to -1/3 and so on.If the input signal > -1/3 even a little bit then we go from 00->01. \$\endgroup\$
    – Miss Mulan
    Aug 18, 2022 at 21:21
  • 2
    \$\begingroup\$ @MissMulan, I refer you to electronics.stackexchange.com/questions/462522/…. Some ADCs may use a full LSB for the first bit. Others will use 0.5 LSB for the first step (-0.5 LSB to +0.5 LSB) and 1 LSB thereafter to minimise quantization errors. \$\endgroup\$
    – Transistor
    Aug 18, 2022 at 21:29
  • 1
    \$\begingroup\$ Can you explain where do the value come from? \$\endgroup\$ Aug 18, 2022 at 21:39
  • \$\begingroup\$ I calc the step size to be 4/3. That would have 01 and 10 represent -2/3 and +2/3 respectively. Can you show how you got -1/3 and +1/3 please? \$\endgroup\$
    – RussellH
    Aug 18, 2022 at 22:43

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