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Even simple HDL designs takes hours to synthesize, while compiling the Linux kernel on the same machine completes in under 15 minutes. Please explain why with a breakdown of the tasks the synthesizer has to carry out.

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    \$\begingroup\$ Why the close votes? The question seems broad but given a little understanding of the processes involved it is not complicated and can be answered in a few words. \$\endgroup\$
    – RoyC
    Aug 19 at 9:18
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    \$\begingroup\$ It's a bit like saying "building a house takes longer than digging the garden so please tell me how to build a house". There are plenty of resources online to research both. \$\endgroup\$
    – Finbarr
    Aug 19 at 9:45
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    \$\begingroup\$ Before I started to write this comment, no specific reasons were added in comments as to why this couldn't be answered to some extent in a reasonably-sized answer. The fact that it was answered that way proves it was possible. Since we were getting flags regarding the closure of this question, and since the current answer shows an answer was possible, let's give this question a bit more of a chance to see if the OP's expectations were reasonable. (We still answer questions on Ohm's law here, where someone is stuck, despite there being many other resources about it!) So for now... reopened. \$\endgroup\$
    – SamGibson
    Aug 19 at 9:50
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    \$\begingroup\$ This could well be an essay answer hence lack focus. Synthesis flow is an extensive topic whether in ASIC or FPGA. It is just like asking how does a C program compile. But yea it can also be answered in short points. But that doesn't change the fact that the question lacks focus or specificity. \$\endgroup\$
    – Mitu Raj
    Aug 19 at 12:17
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    \$\begingroup\$ @All - That's the end of the Meta comments allowed here. As mods are encouraged to do, I explained why I reopened the question. There are clearly differing views, but the fact that we got flags forced a binary open-or-closed decision to be made & I made it. It pleased some people, but not everyone. For further discussion, I recommend someone starts a Meta topic, stating your case (so it could start with a for or against question, depending on who starts it). || I have seen other examples where a Q looks like it would require a long A. Don't assume that! Sometimes an OP is happy with a short A. \$\endgroup\$
    – SamGibson
    Aug 19 at 12:33

1 Answer 1

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Compiling a kernel is a process which simply takes some source code and then linearly converts and links it as machine code.

Synthesis is a process which involves making multiple iterations of the synthesis process taking decisions at each stage as to whether the design meets the constraints set. In order to minimize area. For any reasonably large design this can take a long time.

The first stage of synthesis is to take your code and convert it to generic sequential gates and the combinational logic between them. This process is linear and fairly quick.

Then the tool minimizes the combinatorial logic it will take a number of passes at this until it has produced the minimum number of logic terms.

Now the real work begins, it has to implement the sequential and combinatorial logic in a form which minimizes area and still meets timing constraints for the particular library being used. This is a complex process and can take many iteration. If you manually try to work out all of the timing for say a 4 bit synchronous counter and then repeat that for every gate from a library you could use you will get some idea of the complexity of this process.

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    \$\begingroup\$ "Now the real work begins, it has to implement the sequential and combinatorial logic in a form which minimizes area and still meets timing constraints for the particular library being used." If this is where the Lion's share of the time is spent can you explain what makes it slow? \$\endgroup\$ Aug 19 at 15:20
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    \$\begingroup\$ Exploring large solution spaces usually can be parallelized well on some level, is it also the case for synthesis? Does modern synthesis software make a good use of the multicore processors we use? \$\endgroup\$
    – jaskij
    Aug 19 at 16:01
  • \$\begingroup\$ I'll also throw out that the more performance/size/optimization requirements needed, the more time it may take. Getting a processor to synthesize is "easy"... getting a processor to place & route so that the entire chip is fast enough to be competitive and small enough to be commercially viable and manufacturable is harder. \$\endgroup\$
    – W5VO
    Aug 19 at 18:51
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    \$\begingroup\$ Synthesis is also "simply" taking one form of describing a system and converting it to a different form. If you do not care about area, power, and timing, it can be done very quickly. The source of slowness is trying to optimize. The more you constrain, the slower it gets to find the increasingly more rare satisfactory solutions. The main question is why synthesis tools don't give you an option to be fully profligate with resources in order to get a quick turnaround. \$\endgroup\$ Aug 19 at 18:52

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