How to avoid or compensate for reverse biased base-emitter breakdown in this BJT active clamp design?

Question

This active clamp design is elegant and simple, and works well to prevent OUT from exceeding the supply voltage (+15V), but fails when IN is low enough to reverse bias Q1's base-emitter junction beyond its reverse-breakdown voltage. When this happens, that junction begins to conduct, and its otherwise perfect behaviour is ruined.

Q2 is just a diode-connected device matching Q1, to obtain a \$1 \times V_{BE}\$ offset.

This \$V_{OUT}\$ vs. \$V_{IN}\$ is what I'd like to see, if Q1's B-E junction didn't ever break down:

However, if I use a transistor whose base-emitter reverse-breakdown voltage is 7V, this is what would happen when IN drops 7V below the base potential of +14.3V:

The problem is clear, that low input potentials (below about 7V here) don't survive intact to OUT.

Edit: Properties that I wish to retain:

• Extremely high impedance looking into Q1's emitter. Inputs all the way up to 14.8V won't even know Q1 is there.

• Clamping level is precise, within 0.1V of +15V, and easy to "set". This is why I am using BJTs, their \$V_{BE}\$ is so predictable.

• A sharp "knee" when the input passes +15V, and Q1 begins to conduct. The transition is much sharper there than a regular diode clamp to a low-impedance source of +14.3V.

Question:

• Can anyone suggest a way to avoid or compensate for reverse breakdown, without compromising these virtues?

• Are there other designs with similar simplicity, impedance and clamping "sharpness" that do not suffer from this problem?

Update

Some users (Vladimir, Tim Williams) suggested fitting Q1 with collector and emitter reversed. Spehro Pefhany fixed a problem with doing only that, and both Tim and tobalt suggested using a different MOSFET/BJT to shunt. This is what I've done with those ideas:

^{simulate this circuit – Schematic created using CircuitLab}

By reversing Q2, it solves the original problem I had of the base-emitter junction being excessively reverse biased, but it simply moves that problem to the other side. To deal with that, D2 absorbs most of what would have appeared between Q2's base and emitter, and that junction can now never go beyond -3V or so.

Q1 is the new current shunt, but its base-collector junction also suffers from being reverse biased when IN (and consequently Q1's collector) goes negative. That problem is easily solved by D1.

However, something else unexpected happens, which really improves the sharpness of the knee, and flatness of the clamped output. With Q2 reversed, its current gain is now very low, meaning that when clamping occurs, a big chunk of current that exits its emitter is drawn in from the base, via D3. Consequently, the voltage across D3 and Q1's \$V_{BE}\$ now track each other much more closely. I've been able to remove the very stable 0.7V offset provided by the diode-connected transistor, and replace it with D3 to leverage this new behaviour.

A simulation predicts that current from OUT to ground via the clamp remains under 100nA all the way up to 14.9V input, which is better than my original design. The knee is sharper, and OUT never exceeds 100mV above \$V_{REF}\$ all the way up to 50V at IN. Again, better than the original circuit.

Since there are so few stages in the design, there's very little delay between an increase in input potential and the onset of current shunting, and step response is really good.

Answer 1

Maybe something like this (essentially @Vladamir's comment with a fix)

^{simulate this circuit – Schematic created using CircuitLab}

Inverse beta is not that high, depending on the transistor, so the results may be YMMV.

Answer 2

Use inverted operation.

I did something like this, some years ago; it didn't need VREF > V_EB so it was a bit simpler, but this should also work.

^{simulate this circuit – Schematic created using CircuitLab}

Addition is the cascode (Q3) to increase VREF range; for VREF < V_EB, it can be removed (disconnect B, short E-C; and short out D1, it isn't needed then).

R1 and Q1-Q2 function identically to R2 and Q1-Q2 in the OP circuit; however, Q4 boosts the current, compensating for the poor h_FE in inverted mode (at least for most types; of which 2N3906 is no exception). R3 serves both to discharge Q4 base charge (faster recovery), and to balance the collector currents; offset voltage can be adjusted somewhat by varying the ratio of the two resistors.

Note that, as a V_BE cancellation type circuit, the temperatures of Q1 and Q2 must be matched to keep offset low. A monolithic dual is preferred, but these are quite rare these days; matched dies are readily available, but as separate dies, their temperatures needn't track very well. On the upside, the current flow through such a circuit should be quite low, and thus the thermal error also small.

Note finally, the clamp voltage needs to be at least a few volts, to get adequate current in R1, plus enough voltage to activate Q4. This is not a general-purpose min(a, b) circuit. If variable VREF is needed, R1 could be replaced by a current sink, or R3 as well (both being parts of a current mirror, say). That extends operation to a minimum of a couple V_BE; for still wider range (and also a sharper knee), I would recommend a fully active (i.e. op-amp based) circuit.

Answer 3

Here are some possible approaches. In each case, the "out" voltage is the right leg, and the +15V is on the left leg.

^{simulate this circuit – Schematic created using CircuitLab}

The last one is slightly sharper than the middle one. On par with your initial circuit suggestion.

Finally here would be a circuit, that is much sharper than your initial one:

^{simulate this circuit}

Placing the Schottky in between the bases like in the third schematic above lowers the threshold, even below the power supply level. Also one can play slightly with the two resistors to adjust the threhsold.