I was studying ADC basics from this document, AVR127: Understanding ADC Parameters. I have a question regarding the throughput calculation. The document reads,
Consider the case of single-ended conversion where one conversion takes 13 ADC clock cycles. Assuming the ADC clock frequency to be 1MHz, then approximately 77k samples will be converted in one second. That means the sampling rate is 77k.
May I know how they reached this value? (I know they divide the clock frequency by 13, but don't know why.) I am not able to find the logic behind it. If you can explain the math, it would be appreciated.