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I am fairly new to simulations with LTSpice. I am trying to validate filter design that I have made, but I am quite confused to the results that I am getting with LTspice.

It seems like when I put a Label Net to my circuit I get a different response... This is the response I get when the label net is not connected. enter image description here

This is the response I get when the label net is connected enter image description here

Any help would be useful in order to understand what happens or at least get consistent results.

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    \$\begingroup\$ I just tried this circuit and got the same results either way. You could try saving the file, restarting LTspice and reloading the file. Also make sure you don't have any connections to the labels hidden offscreen. \$\endgroup\$
    – GodJihyo
    Aug 29, 2022 at 19:51
  • \$\begingroup\$ Thank you, I did that and it worked :) \$\endgroup\$
    – DRF
    Aug 29, 2022 at 19:53
  • \$\begingroup\$ I can't reproduce your errant result. The top graph is what I get with nets not labeled and labeled. Post the netlist of the errant run (right-click on the schematic pane, view, spice netlist)? \$\endgroup\$
    – qrk
    Aug 29, 2022 at 19:54
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    \$\begingroup\$ @DimitarZhekov Modifying anything in the schematic causes LTspice to re-number the non-labeleld nodes. If you leave the plotted waveforms as they are, chances are they will reflect the change in the nodes, meaning your plotted quantity is from a (now) different node. You don't have to close anything, schematic, waveform viewer, or even LTspice -- just re-click on the desired node to plot it (optionally delete the previous trace). See Ste's answer, below. \$\endgroup\$ Aug 30, 2022 at 6:55

2 Answers 2

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I built it in CircuitLab:

schematic

simulate this circuit – Schematic created using CircuitLab

The Bode plot looks like this:

enter image description here

This seems to match your first screenshot (approximately -30dB at approximately 4.5 MHz), not your second screenshot.

I'm not sure what's going wrong in your net labeling, and I don't see an obvious way to get your 2nd Bode plot from that circuit. You may want to inspect a text-format netlist to see if there's some unintended connections happening.

Hopefully this just gives some validation that your first circuit's simulation result is correct.

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  • \$\begingroup\$ I closed LTSpice and it worked. Thanks for the help :) \$\endgroup\$
    – DRF
    Aug 29, 2022 at 19:54
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The main problem here is that when you run a simulation, the data that is computed references the node names that were set right before you ran the simulation. If you change node names after the simulation is over (i.e. your waveform viewer is already up) and then start probing around your circuit without re-running the simulation, your results will be erroneous. After any modification of node labels it's best practice to close the waveform viewer, re-run the simulation, and then re-probe your nodes.


A corollary to this is for when you would like to "semi-interactively" add/remove components or circuit paths while the waveform viewer is up and set up exactly how you like it. Adding and/or deleting components and wires can reshuffle around any unlabeled node names. Therefore, instead it's best to preemptively put extra series resistors in those paths and change the values between something like 1m (for a short) and 1g (for an open). This will ensure all the nodes names remain constant while you are effectively adding or deleting things by simply changing the values. You can keep the waveform viewer up with all your nodes/currents already probed as you change things around and re-run the simulation.

Note: for "removing" capacitors, I usually use a value of 1f.

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    \$\begingroup\$ No need to close the viewer, just re-click on the node to re-plot it (optionally delete the previous trace). \$\endgroup\$ Aug 30, 2022 at 6:55

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