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Consider the circuit in the picture, where we have a voltage source (input) \$V(t)\$ and a capacitor \$C\$. The goal is to derive a state-space model of this circuit. The circuit satisfies the following equations

$$ \dot{V}_C(t) = \frac{1}{C}i(t) ,\quad V_C(t) = V(t). (1) $$

My intuition is to define the voltage \$V_C\$ around the capacitor as the state variable, which means that I should have a state-space model in the following form:

$$ \dot{V}_C(t) = a_1 V_C(t) + a_2 V(t), (2) $$ i.e. writing \$\dot{V}_C\$ as a function of the state \$V_C\$ and the input \$V\$, for some parameters \$a_1\$ and \$a_2\$.

However, clearly it is not possible to reformulate (1) into the form of (2), because there is no way to eliminate the variable \$i\$.

My question is then how to formulate a state-space model in this example. Is the choice of the state variable wrong since \$V_C = V\$? Then does it mean that there is no state in this example?

  • 1
    \$\begingroup\$ An ideal voltage source has zero internal impedance therefore, the voltage across C will always be V, no matter what V is. The only thing that matters in this case is the current through C, and that only if V varies. \$\endgroup\$ Sep 5, 2022 at 16:30

1 Answer 1


This is a trivial system in that \$G(s) = 1\$. \$V_{C}\$ is not independent from \$V\$.

A better way is to start with a system with a pole, then take the limiting case.

For example:


simulate this circuit – Schematic created using CircuitLab

Then the state equation for \$V_{C}\$ as the state variable is,$$\dot{V_{C}}=-\frac{1}{RC}V_{C}+\frac{1}{RC}V$$ Taking the limit as \$R \rightarrow 0\$ cause the equation to become undefined.

To Answer your questions: The capacitor voltage can be considered a system state but it is completely dependent on the applied voltage.


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