# Why is this ideal diode bridge rectifier simulation in LTSpice not working as expected?

I'm trying to simulate a full wave bridge rectifier circuit with the capacitor filter. The alternating voltage supply is 30 V at 50 Hz.

The peak value for the voltage across the load is 28.5 V. However, I don't get how that's possible. Is it the RMS voltage or the average voltage across it?

After increasing the load to 30 kΩ, I tend to get the same plot as before. I'd expect the graph to smoothen out as the rate of discharge has decreased due to a rise in load resistance and hence the time constant should increase but this has clearly not happened.

I'm not sure what is happening on your side, but I get an error message:

Error on line 850 : .model idealdiode d(ron=0 roff=1 meg vfwd=0.7) * Unrecognized parameter "meg" -- ignored

You can't have a space after Roff=1, it has to be Roff=1meg. Then the result will change to the expected output.

• This is the reason. OP should have seen the error log popping up. It's also the reason why thre's ripple with a 1k load. And also that timestep is ridiculous (and the cause for the low resolution of the waveform). OP, next time try plotting more than one single waveform, try t debug the circuit yourself. And it wouldn't hurt to avoid Ron=0, to avoid possible convergence issues (fortunately, this circuit is simple enough, but more complex ones may crash and the engine may not point at the true cause). Commented Sep 6, 2022 at 14:23

The peak value for the voltage across the load is 28.5V.However, I don't get how thats possible. Is it the RMS voltage or the average voltage across it?

The peak DC voltage is the peak AC voltage minus two diode volt drops. 28.5 volts DC sounds exactly what I would expect with a 30 volt peak AC signal.

After increasing the load to 30kΩ,I tend to get the same plot as before.I'd expect the graph to smoothen out as the rate of discharge has decreased due to a rise in load resistance and hence the time constant should increase but this has clearly not happened.

I expect that you may not have changed the resistor value to 30 kΩ.

• When I change capacitance values, the graph changes. However, for a constant capacitance value, changing the resistor values has no effect on the graph. Commented Sep 6, 2022 at 16:30
• Ensure that the capacitor and resistor both connect to the ground symbol. At the moment they don't look like they do. But, I can assure you that the value of the resistor is not being changed. Commented Sep 6, 2022 at 16:34

Keep in mind that your 30V SPICE source setting is 30V peak (+/-30V) so it corresponds to 21.2V RMS for a sine wave.

Also, your ripple voltage is insanely large for a 40,000uF capacitor and 1K load. Something is very wrong- something seems to be drawing amperes not mA (or the cap is not 40,000uF). About 14mVp-p is expected (back of the envelope manual calculation) with a 1k$$\\Omega\$$ load. Your plot shows several volts, which is hundreds of times too much.

I suggest you name the output node to make sure you are not measuring some other schematic.