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I am simulating a 220 V to 5 V circuit using LTspice. Somehow the position of the ground will affect the simulation result.

Picture 1: when the ground is put at the 220 VAC voltage source's '-' side, the output looks terrible.

Picture 2: when the ground is put at the output side, the output seems correct, is a pretty normal 5 V.

Question: Why does the location of ground affect the result, and where should the ground be placed?

enter image description here

enter image description here

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  • \$\begingroup\$ Get used to adding labels to nodes you use for plotting: it will not only make your life easier but, people looking at your pictures will know exactly what you're plotting. Currently V(N001) and V(N004,N001) are meaningless for anyone that doesn't have that exact schematic as you. \$\endgroup\$ Sep 7, 2022 at 8:36
  • \$\begingroup\$ @aconcernedcitizen Thanks for your advice. I am new to LTspice. I will make it better next time. \$\endgroup\$
    – John
    Sep 7, 2022 at 8:44

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You are subtracting two voltages to get a result in the first case. The problem is that the algorithm makes each of those two voltages "close enough" to move to the next time step however the error when they are subtracted (across a time step) is large enough to muck up the plot.

If you specify a small maximum time step (say 10 microseconds) then the results will improve greatly in the first case, but it's still better to put the (arbitrary) ground where it is in the second case since the simulation will run faster. Eg:

enter image description here

You can think of this as one of those "simulation does not match reality" things, but in reality one can also have problems when you try to measure relatively small voltages with a large common mode voltage relative to ground.

P.S. if you are simulating a 230VAC RMS input you should use 325 (peak voltage) not 230 in your sine source.

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  • \$\begingroup\$ Interesting, if you do something similar only with resistors, it will show you a clean sine wave even if there is only a 100 mV amplitude. \$\endgroup\$
    – Arsenal
    Sep 7, 2022 at 8:44
  • \$\begingroup\$ @Arsenal with ideal resistors the voltages settle instantly to negligible error. Not so when (significant) capacitance or inductance is added. \$\endgroup\$ Sep 7, 2022 at 8:50
  • \$\begingroup\$ Great, thank you very much! Changing the "Maximum Timestep" to 10us helps and I got the correct result. But I am still confused why the LTspice give the wrong result without giving any warning/error. \$\endgroup\$
    – John
    Sep 7, 2022 at 8:58
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    \$\begingroup\$ This kind of thing is pretty common in 'finite element' type analysis. If your mesh in a mechanical simulation is too coarse in critical areas you'll get wildly wrong results, if it's too fine the simulation will take too long to run. As George Box said - "All models are wrong, some are useful.” \$\endgroup\$ Sep 7, 2022 at 10:33
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    \$\begingroup\$ AFAUI, SPICE applies a linearized model at each time step. In this case, the algorithm chooses a time step in the 1 millisecond range. You can see that if you zoom in on the plot- the piecewise linear results. That's 10% of an entire 50Hz half-cycle, so significant errors (in this case about +/-2%) are possible. That's my guess anyway. \$\endgroup\$ Sep 7, 2022 at 11:05

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