I have several hundred RGB+White LED lights which are controlled by a driver circuit which is no longer manufactured, and trying to plan some maintenance and possible replacement of the driver boards. I've traced out the circuit, and I'm trying to understand if I have it correct, and exactly how it works.

Briefly, it's a chain of four LEDs, each approx 3W. These are fed in a chain by a fast (500 KHz) buck regulator in constant-current mode, based on a 0R68 current sensing resistor at the bottom of the chain. Each LED has a n-channel MOSFET which shorts it out to turn it off. I've never seen this kind of "stack of possibly-shorted LEDs" before.


RGBW CC driver circuit diagram sketh


My understanding of a single channel (eg red) is this:

  • The CPU output drives the base of Q1 in the standard way; it has a VON of 1.6V and will be either pulled down by R2 or pulled to 3.3V by the CPU; we see PWM with pulses as short as 30 us.
  • With Q1 off, the gate of Q2 is fed from 12V through 27K (R3+R4) and held at no more than 6.8V above its source by D1; thus Q2 conducts from drain to source; thus LED1 has no voltage across it and is not lit.
  • With Q1 on, the gate of Q2 is held at ground; thus Q2 doesn't conduct; thus LED1 has voltage across it and is lit. Current loss across R3 + Q1CE of a few milliamps.
  • Thus each channel sends the current either through the LED to turn it on, or through the MOSFET, to turn it off.


My questions are all "what about the stack?"

  1. If, say, Q1 is on, what is the effect of the path through LED1-D1-R4-Q1CE?
  2. What are the voltages in the "ladder"? If all the LEDs are on, it should be (from bottom up),
    • VSENSE
  3. The voltage across each LED with be either the VF of that LED, or the VD-S of the MOSFET, which depends on the RD-SON, which is about 1R5 (depends on a number of things); thus at 1A would be about 1V.
  4. A typical RGBW LED might have VF values of 2.1, 3.0, 3.1, 2.9 (says Cree); if we run at 1A, VSENSE across RSENSE will be 0.68V, ie with all the LEDs on we should see 0.68, 3.58, 6.68, 9.68, 11.78 V.
  5. With all the LEDs off we should see 0.68, 1.68, 2.68, 3.68, 4.68 V
  6. If the LEDs don't have same/similar IF, some will run disproportionately brightly, and age disproportionately quickly.

Could some expert souls sense-check my underdstanding? Is this a "well-known circuit"? Does it have a name?

It's certainly new to me, though I certainly see the advantages of having a single constant-current source for four LEDs.

References for parts

  • Q2 is (half of) 6-pin SMT marked "561", believed to be FDC6561AN: 30V, 2.5A, 0R095 n-channel MOSFET
  • D1 is (half of) 6-pin SMTs marked "KE5", believed to be MMBZ5235BS: 200 mW, 6V8 zener, SOT363 package.
  • R3 is (quarter of) 8-pin SMT marked "153"
  • R4 is (quarter of) 8-pin SMT marked "123"
  • Rsense is 0R68 (labelled ".68" and measured).
  • LED1 not part of question, varies. CPU, Q1, R1, R2 not part of question.


  • 2022-09-14: TI calls this "parallel FET PWD dimming", in for example LM3409 datasheet section 8.3.8., and says it allows for much faster dimming than controlling the constant-current source. To control long off-times, see this question

1 Answer 1


This is a known and practical technique.

While not likely an issue for 3 W LEDs, the precise currents in the LEDs is not equal -- for instance, if the G LED is off (bypassed; FET on), a small amount of current flows from the junction, UP through D1 and R4 to GND. Thus the R LED will have a slightly (~ 1 mA) current than the other LEDs. This won't be significant in a 3 W system.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.