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In this question, I am mostly thinking about the history of process sizes for CPUs.

About 25 years ago, I seem to remember that (with the caveat that I am not sure that the term in use in english was "process size"):

  • I was hearing about process sizes in the tens/hundreds of nanometers;
  • Process size was related to the size of a single transistor;
  • Process size would eventually hit a hard limit (in the low tens of nanometers), as below a certain size, quantum physics effects prevent the transistor design from being operational;
  • Smaller process sizes are good because they lower the energy for activating a transistor, and thus lower global chip energy consumption (all other things being equal);

However, today, I hear that:

  • The most advanced process sizes are in single-digit nanometers;
  • The rated process size does not reflect the size of a single transistor;

Thus, I am wondering:

  • Has the term "process size" changed? What did it use to mean exactly, and what does it mean today? (Alternatively, was it always marketing?)
  • When and why did that change happen?
  • What do electronics gain now from smaller process sizes?
  • Did I misunderstand anything?
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    \$\begingroup\$ See: extremetech.com/computing/296154-how-are-process-nodes-defined \$\endgroup\$ Sep 15, 2022 at 8:16
  • \$\begingroup\$ @TimWilliams Wow, good overview. I have experience in the lithography end of the system (dated back about 15 years ago, so large grain of salt here) and I could already see at the time that the complexities of reducing features would hit a limit that would be very difficult to continue pushing smaller. We were already in a place where the mask features a designer wanted, after all the lithography writing optics systems had their say, looked almost nothing like what drove the lithography system. We'd have to process the desired outcome via 2D inverse Fourier to get the drive sequence. \$\endgroup\$
    – jonk
    Sep 15, 2022 at 8:36
  • \$\begingroup\$ @TimWilliams Optics is also quite difficult when you move away from visual wavelenghts. Cheap stuff goes completely away. First, we moved away from quartz and fused quartz optics into sapphire optical systems and we were already discussing diamond optics or other alternatives. Meanwhile and still earlier than that, it also become obvious that air was a problem at shorter than 200 nm -- so vacuum quite early became a requirement. I left about the time when immersion lithography was becoming a thing. So I really enjoyed reading that link!!! Thanks! \$\endgroup\$
    – jonk
    Sep 15, 2022 at 8:41
  • \$\begingroup\$ en.wikichip.org/wiki/technology_node \$\endgroup\$ Sep 18, 2022 at 12:32

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Yes, the definition has changed, and it is better to refer to process node than process size.

We can refer to Moore's law that states that the number of transistors (on a microchip) doubles about every two years - and we consider that this is the number of transistors for the same surface.

A long while back, every manufacturer worked more or less independently on its process.

Then internal processes were developed to be compatible with external manufacturers such as Chartered Semiconductor or TSMC. The internal factory was used to adjust process settings and produce "small" volume products or prototypes, and subcontracting essentially big volumes.

A semiconductor company can still have its own specificities regarding the process, but has to be compatible with the manufacturing capabilities of the third party. For instance it's fairly easy to change the duration and temperature of a process step.

Gate cell libraries (depending on process) are technological differentiators of one semiconductor company over another, but there other important factors such as the know how and services for market segments.

Today, with the cost of a foundry, the only viable option can be that competitors have to coinvest in a factory that costs 20 billion USD, therefore pushing even more towards common technology parts.

I remember reading ITRS (International Techology Roadmap for Semiconductors) documents which seems to be replaced with "International Roadmap for Devices and Systems" now. IMHO that helped bring somewhat a common reference for what a technology node size is, but still Intel's 7nm is more like others' 5nm.

Benefits from smaller technology - still valid for the 3nm node - are:

  • Higher density;
  • Higher performance;
  • Lower power consumption.

A lot of these benefits was driven by - and I suppose still is - by lower (interconnect) capacitance due to the density which lowers the consumption for each changing bit, and lower operating voltages.

Memory and CPUs are important drivers for the semiconductor roadmap.

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