The 6502 is one of the nicest examples of using a 16-bit address bus on an 8-bit CPU. In addition to the named registers available to the programmer, the 6502 has half of the program counter along with a secondary register attached to each half of the address bus, each half of which can, during each cycle, be loaded from either the data bus or the output from the internal ALU, or hold its content. In each cycle, the address bus can either output the contents of the secondary registers, the program counter, or (for the upper address byte) the special values $00, $01, or $FF [6502 convention is to precede hex values with a dollar sign].
A typical 6502 instruction that illustrates how nicely things fit together is opcode $5D, "EOR abs,X". This instruction takes a 16-bit address which is placed immediately after the instruction LSB first, adds the 8-bit value of the X register, reads a value from the resulting address, exclusive ORs that with the accumulator, and latches the result back to the accumulator.
During the cycle after the 6502 fetches an opcode $5D the 6502 will output the program counter on the address bus and prepare to read an operand byte into the ALU input register (something it does after fetching every opcode, while the instruction decoder settles). By the time the operand-fetch cycle completes, the decoder will have determined that the instruction is using abs,X addressing mode, which will require reading a third byte from the instruction stream.
During the next cycle (during which the MSB of the address is being read), the program counter will be output to the address bus while the ALU receives the ALU data register (which holds the just-read LSB of the specified address), the contents of the X register, and an indication it should add the two values together, without any carry input.
During the cycle after that, the upper half of the address register will latch the value that was just received from memory while the lower half will output the value from the ALU. If there was no carry during the previous ALU operation, this address will be the correct address. If there was a carry from the ALU operation, this address will be incorrect but the 6502 will issue a memory read request to it anyway. In either case, however, the ALU will be fed the newly-fetched byte of memory along with a constant zero and an "add values plus one" command, but while it does that the 6502 will prepare to do one of two things depending upon whether there was a carry.
If there was no carry, the 6502 will output the program counter on the address bus while it places the newly-read value into the ALU along with the contents of the accumulator; the ALU's output will then be fed back to the accumulator on the cycle after that (while the 6502 is doing its unconditional operand fetch).
If there was a carry, the 6502 will latch the ALU output into the top half of the address bus while the lower half keeps outputting its present value, and another read cycle will be issued. Once this is done, the 6502 will process the second read value the same way as it would have processed the first in the absence of a carry.
An important thing to note is that while the 6502 behaves as though it computes an address by adding a 16-bit value to an 8-bit value, there is no 16-bit arithmetic hardware outside the program counter (whose top half can be incremented while the bottom half advances from $FF to $00). What looks like 16-bit addition is done as two 8-bit operations. The first half is performed while the upper half of the address is being fetched, and the second half is performed speculatively while the system performs a speculative read. Either the results of the read or the upper-address computation will be useless; the system will discard one of the results at the end of the cycle.