In my FPGA design project, I created a few modules that can be used to emulate output from another module. Then there were modules that would inject erronous data or signals that signify errors. By doing this, we were able to test the system as a whole when certain type of data appears in part of it, or error happens in one part of it. I did this because it was not possible to simulate the whole entire system in simulation alone.

The project was an improvement to an existing product that was supposed to be backward compatible with the older product. The system's test involved some other computers running a program that no body actually understood. This program send commands to my design and processed the responses. Therefore, I used the approach I have mentioned above to find out if the new design still works as expected with the old software by injected errors during system test and injecting data that represents specific scenarios during the systems test.

Now my question is, what is name of this technique. It is not called design for test since I believe that has a specific meaning with boundary scan. Then what is it called? The error injection modules were removed in the "release version" of the design.


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These are generally referred to as "test benches". In addition, modules designed to provide a blackbox representation of something external to the design (e.g. a piece of hardware, or other parts of the design) would be referred to as "functional models".


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