Why is On Die Termination (ODT) only available for Data Lines (DQ, DQS) but not for Address Lines in in DDR2/DDR3 memory?

Question

I am trying to understand the need for termination resistors in DDR2/DDR3 designs and I have seen some Max 10 dev kit boards that don't terminate the address lines with 50 Ω terminating resistors.

However, DDR3 chips do have the On Die Termination (ODT) feature just for the Data and DQS lines. Why don't we have it for address/control/clock lines? Since Max 10 dev kits obviously work without termination resistors it's not really needed, but then what happens to the energy? Wouldn't it all reflect or radiate?

I assume receivers are high impedance and don't consume energy so the terminations are really needed to consume the energy. Is it the wrong way to think about it?

Answer 1

Because the address and control lines need to be connected to ALL of the chips on a memory channel, vs. the data lines are only connected to ONE chip (in each rank, and only one rank is active at any given time). ODT on the control and address lines would result in reflections as well as the total termination would be much too small. Also, one of the reasons that ODT is particularly important is that it can be enabled/disabled as necessary, which is required when turning the bus around between reading and writing. The address and control lines are always unidirectional, so dynamically controlling the terminations is not required.

Edit: and the link that @nanofarad posted (No terminations on point to point DDR3?) states that the termination resistors are not required in all circumstances, although there are some trade-offs when doing so.