1
\$\begingroup\$

I'm designing a power amplifier for a piezoceramic transducer with these specifications: 20 W and 400 kHz - 1 MHz bandwidth.

I do not have much experience with power amplifiers, so my design must be simple. I'll take care of the PCB layout, that is my work, but for the design I need a bit of help.

In the figure I show you my schematic taken from LTspice. The source is a sine wave.

Do you see any major mistakes, something missing, or something I have not considered? In your opinion, should this amplifier work without issues?

The simulation runs well, with some current spikes in the drains of the MOSFETs, but I think that is pretty normal.

enter image description here

Hello, I made a new schematic based on your feedback. There is a Vbe multiplier with bypass capacitor and a trim to set the current. The op amp are now AC coupled because where there is no input signal I need a symmetric voltage on the gate of two MOS, to get some bias currents on both. Now I'm asking what regulate the DC stability of this amplifier, when there is no input signal applied. There is not a global feedback so the output stage is isolate and stability should be delegated to the thermal stability of the Vbe multiplier and to the tolerance of the resistor, right? enter image description here

\$\endgroup\$
1
  • 1
    \$\begingroup\$ Note that op amp AD811 is max +/- 18 V ... Use +/- 15V max. \$\endgroup\$
    – Antonio51
    Sep 22 at 15:11

3 Answers 3

2
\$\begingroup\$

Running FETs in a linear mode like that is not recommended. All FETs can be switched. Very few FETs are specified to remain thermally stable when run linear.

Neither the IRF520 nor the IRF9520 FETs you have shown have a 'DC' line on their SOA graphs, the lowest being 10 ms. They are unsuitable to run a bias current through, with a high voltage on them.

If you must run an unspecified FET in its linear mode, a reasonable rule of thumb is don't exceed more than 10% or so of its rated dissipation.

Bipolars are better at linear dissipation, if you can find ones fast enough. They don't have the multiple sub-transistors that make FETs such high performing thermally stable switches (high current at very low voltage, no current at high voltage, linear mode for micro seconds), but which thermally run away under DC linear conditions.

What distortion are you targetting? Losing all those bias diodes to run hard class-B will eliminate the bias current, if you can tolerate the crossover.

\$\endgroup\$
5
  • \$\begingroup\$ So in your opinion these MOS can't tolerate a Vds of about 30 V and a bias current of 20 mA for at least 50 ms or so ? This way I don't exceed 10 % of rated dissipation, neither in DC nor in linear amplification region, when the power dissipated is about 3 W. The amplifier will remain in the off state most of the time (so every MOS dissipate 600 mW in DC) and sometimes I'll send a sinewave for 10 ms. I have not a THD target but a full crossover distortion is not tolerable. \$\endgroup\$
    – mtx4
    Sep 22 at 11:10
  • \$\begingroup\$ @mtx4 It's a thing to very wary of. As you asked in the question, is it something you've considered? All I can say is test it. As they don't have a DC SOA specification, it's on you, not the manufacturer, whether they will do it. There are other FETs that do have DC specs, though finding them will be hard. There are bipolars that run fast enough, though finding them will be hard. What you have proposed is a low cost route, that may or may not work with those devices. There are beefier FET devices, finding them will not be hard. \$\endgroup\$
    – Neil_UK
    Sep 22 at 11:34
  • \$\begingroup\$ @mtx4 The thing to think about is why the manufacturer has not specified these devices for DC operation? Surely it would be worth their while to do so if they could? \$\endgroup\$
    – Neil_UK
    Sep 22 at 12:07
  • \$\begingroup\$ HEXFETs have long been used in linear operation. Modern datasheets omit the DC SOA curve for some reason, but typically outperform their RthJC ratings; for example I've tested a Siliconix IRF740PbF to failure at 180% of the rating given by RthJC(max), at 300V. The die appeared to be full size, i.e. not subject to a shrink in the intervening years. SOA is very much something that can be tested for; but mind that it should be tested regularly to ensure suitability for production. This is the main value a DC SOA curve gives you: design and production confidence. \$\endgroup\$ Sep 22 at 13:16
  • \$\begingroup\$ Maybe I will give a try to this design. It's not something I have considered, I'm honest. I focused on the load type, that is capacitive, and BJT are much prone to oscillate with high capacitive load than MOS, so I choiced the MOS way, ignoring thermal runaway effect. Anyway after the last comment about HEXFET I'm a bit more confident. \$\endgroup\$
    – mtx4
    Sep 22 at 13:51
1
\$\begingroup\$

As @Neil_UK cautions, be mindful of the SOA. Lack of a DC curve is not necessarily indication of failure in that region, it just means they didn't test and document it.

At least historically speaking, HEXFETs like the IRFxxx series have been used regularly for linear applications, including RF amplifiers up into the shortwave band. I don't have a problem with this component choice, but due diligence would be encouraged, especially in production.

Testing would consist of taking a sampling of parts, and operating them at maximum required Vds, Id for long enough to thermally stabilize; with a heatsink, perhaps a few minutes. Do this sampling and testing periodically, and especially following any substitution by different manufacturer, product change notification (PCN), or fallout from production test or user failures.

If production is N/A, testing is also N/A. It's a one (or few)-off, who cares, it worked once that's enough.

Anyway, regarding the circuit itself: consider using a Vbe multiplier motif, with bypass capacitors. This will allow the MOSFETs to saturate nearly to the supply rails, and the multiplier can be adjusted by trimmer to set desired bias current. Note that Vgs(th) varies substantially between individual parts. You will not be able to set bias current with a fixed diode stack. Thermally couple the transistor to the MOSFET heatsink, so that its Vbe tracks with Vgs(th) (which similarly has a negative tempco). Doubtful they track correctly, anyway, so do testing at elevated temperature to check that bias current remains stable, and if it's rising too much, consider introducing an NTC to the bias network as well. It will take some back-and-forth testing to figure out the best values.

Beware of oscillation. A capacitive load can be quite hazardous to many amplifier designs. Without global feedback (i.e., the op-amps don't take feedback from the final output, but merely from their own outputs), there at least shouldn't be oscillation due to op-amp compensation (or the lack thereof); the transistors can still oscillate, in and of themselves, particularly due to poor layout and the combination of load and device capacitances making some manner of Colpitts oscillator. (Use ground-plane layout techniques, and bypass the supply rails with low ESR capacitors. Actually, or maybe don't; relatively high ESR may help, or ferrite beads on the drains. It depends.)

Also, do you know you need bipolar supplies and bridged mode operation? It seems a bit redundant. Higher supply voltage may be feasible

Exceptions could be: perhaps the op-amp can't handle enough voltage, or suitable amps can't supply enough current, or are too slow or too expensive, or doesn't even exist and a discrete solution would be required. I haven't looked into parts of this capability in a while so I don't know offhand what might (or might not) be suitable.

Another option might be using a single output (half bridge) with a relatively low-Q matching network, to increase the load voltage modestly, while maintaining desired bandwidth.

Also, do you know that you'll achieve desired bandwidth in the first place? Typically, piezo devices have numerous resonances at high frequencies, and it may not be clear that you'll achieve the designed mechanical bandwidth. But it could be the "400kHz-1MHz" spec is merely electrical, and mechanical is just whatever, I don't know. Just putting this out there.

Tim

\$\endgroup\$
1
\$\begingroup\$

I would bypass the diode strings with capacitors. There's also no way to regulate the bias current, so that will be a problem. Instead, run this thing class D with nice on/off switching and add a resonator at the output, tuned to 400kHz. That's the simplest way to do it - almost takes no thinking beyond tuning the resonator to match the load.

For any sort of Spice analysis like this, you must run it across the parameter spread of the components used.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.