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I have some CD4069UBE and some CD4069BE. From what I understood, the UBE ones should be unbuffered and the BE ones buffered.

But I don't find any datasheet that shows some buffered 4069, so I'd like to test my BE ones to know if they are buffered or not.

How can I test if the outputs are buffered or not?

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    \$\begingroup\$ A somewhat facetious answer: The most obvious method is as follows: Consider what application you have that they need to be buffered for. Try using them in that application or a facsimile thereof. If it works, great, either it's buffered or it doesn't actually need to be buffered, and it doesn't particularly matter which. \$\endgroup\$
    – Hearth
    Sep 22 at 17:08
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    \$\begingroup\$ Nice one. And indeed, for my own hobbyist usage, it never seemed to matter. But I'm curious 😉 \$\endgroup\$ Sep 22 at 17:27
  • \$\begingroup\$ In short, there have never been buffered 4069 parts. The "B" suffix originally denoted a higher supply voltage range for both buffered and unbuffered devices. When the 4000 series was standardized during the '80s the parts that were unbuffered got an additional "U" before the "B". See my answer for more details. \$\endgroup\$ Sep 28 at 12:46

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Testing them is simple and there are many ways, although it requires some equipment.

If you feed in a triangle waveform and connect it to oscilloscope X axis and monitor the output on scope Y axis, the output will look like a round S shaped curve for an unbuffered inverter.

A buffered inverter has 3 inverters in a row, so it will have quite sharp transition at some threshold voltage.

An unbuffered inverter can thus be used as a linear amplifier, just like a cheap op-amp in inverting configuration. Just bias the inverter by connecting a resistor in the order of 1Mohm between output and input. The input should stay biased around half supply. By feeding in AC coupled waveform through a resistance it should work as a linear amplifier. If the output has sharp square wave transitions instead of linear output, it's likely a buffered inverter.

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  • \$\begingroup\$ So i can just wire 3 gates from a cd4069 in series, add the feedback resistor, and compare it to a single one? If similar, it is buffered, if not it isn't. \$\endgroup\$ Sep 22 at 20:59
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Texas Instruments lists a number of different properties for buffered vs unbuffered:

enter image description here

From TI's Application Report: Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics, p11.

So you could measure the propagation delay on the oscilloscope and it should tell you if your parts are buffered or not.

For what it's worth, I couldn't find the -BE part at all; I did find the 4049 buffered part, sadly with different pinout.

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  • \$\begingroup\$ A buffered 4000 family inverter is basically 3 inverters in series. It would have propagation delay of ~100ns at 10V - worse than that of typical buffered gates. \$\endgroup\$ Sep 24 at 2:40
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There's a bit of historical background needed here. There is no double-buffered version extant in the basic CD4000 family. If you want 6 buffered inverters, you gotta use two quad inverting output gates.

In most applications, you actually want single-buffered inverters, since they are not meant as high-output buffers, only as fast and sweet logic functions to drive one or two inputs at most. They perform ideally when used that way. To drive anything more, use inverting output gates (4001, 4011, etc.), or complementary buffers (4041), or gated buffers (4503), or quad latches (4076), etc.

As for checking if any are buffered: feed a square wave with about 500ns rise/fall times to CD4011 and CD4069U. Look at the slew rates on the outputs. CD4011 has more gain and will slew faster.

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There are no buffered 4069 parts. Those with a "B" suffix are not buffered, they are just parts with an older part number. So 4069UB and 4069B are the same chip (this latter being older).

I suspect all your 4069B chips have date codes that go back to the '80s, when the CMOS 4000 series was standardized by JEDEC.

I tracked this problem to the origin of the 4000 series. Follow me on this voyage into the history of ICs.

The 4000 series was invented by RCA and commercialized in 1968.

The older technical reference I could find is a 1975 RCA databook. At page 334 (336 of the PDF - from now on I'll just refer to the original page numbers of scanned documents) you can clearly see that the CD4069B is unbuffered, since it consists of a single CMOS inverter structure (PMOS-NMOS pair).

The "B" suffix didn't mean "buffered" at the time, but it designated a different supply voltage range. That databook explains that at page 21. Excerpt:

Operating Supply-Voltage Range COS/MOS integrated circuits are specified in one of two supply-voltage ranges: "A"-series devices operate from 3 to 15 volts, and "B"-series devices from 3 to 18 volts. [...] Recommended supply-voltage ranges which realistically assess these conditions are 4 to 12 volts for "A"-series devices, and 4 to 15 volts for "B"-series devices.

Why the "B" suffix was later thought to mean "buffered" and where does the "UB" suffix come from?

I couldn't find the exact origin, by my hypothesis is that Texas Instruments, when introducing their line of compatible CMOS devices added the buffering. This can be inferred from this 1975 TI CMOS Databook.

At page 18 they again state that the "B" suffix denotes an extended supply voltage range. Moreover, from what they say there, they give the impression that "A" series devices are plug-in replacements for RCA parts, whereas "B" suffixed devices are improved parts to be used for new designs.

At page 19 they describe the peculiarities of the "B" series. Excerpt (emphasis mine):

BUFFERED CIRCUITS

Most 4XXXXB digital circuits will have double- or triple-buffered output stages to attain:

  • Uniform dynamic performance
  • Improved capacitance drive
  • Uniform input characteristics
  • Lower input capacitance
  • Uniform output characteristics
  • Lower over-all system CV 2 f power
  • Improved noise immunity

So the buffering seems to be part of the improvements on the RCA chips, but it is not necessarily implemented in each device. In fact the TF4069B and TP4069B chips are described at page 55 as interchangeable with RCA CD4069B and the schematic for the inverters shows no buffer.

These improvements seem to have been standardized by JEDEC, as can be inferred by this 1983 RCA CMOS Databook.

At page 48 there is a section titled:

HIGH-VOLTAGE B-SERIES CMOS INTEGRATED CIRCUITS

which mentions (3rd column, last bullet):

JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices.

On the following page you can find two subsections:

Buffered CMOS devices are types in which the output "on" impedance is independent of any and all valid input logic conditions, both preceding and present. All such CMOS product are designated by the suffix "B" following the basic type number.

Unbuffered CMOS devices are types that meet all B-series specifications except that the logical outputs are not buffered and the noise-immunity voltages, VIL and VIH, are specified as 20 and 80 percent, respectively, of VDD for operation from 5 or 10 volts, and 17 and 83 per cent,respectively, of VDD for operation from 15 volts. All such CMOS product are designated by the suffix "UB".

and further below, 2nd column (emphasis mine):

All B-series CMOS devices can directly replace their A-series counterparts in most applications. The UB types are high-voltage versions of corresponding A-series (unbuffered) types.

finally, at page 52:

7. Buffered and unbuffered gates The new industry standard establishes a suffix "UB" for CMOS products that meet all B-series specifications except that the logical outputs of the devices are not buffered and the VIL and VIH specifications are relaxed. The suffix "B" defines only buffered-output devices in which the output "on" impedance is independent of any and all valid input logic conditions, both preceding and present.

Which confirms my suspects about the origin of the confusion.

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  • \$\begingroup\$ thanks for the awesomely detailed archeologist work! \$\endgroup\$ Sep 28 at 17:58
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Look at the CD4069UB datasheet

Page 1 says that this part is for use in cases where "buffers are not required. The consensus seems to be that the UB parts are not buffered.

enter image description here

Also, if you look at page 9 of the datasheet, they give you a schematic diagram of the inverter design. It is a simple two transistor CMOS inverter.

enter image description here

On the other hand, you might want to ask yourself why it matters if its buffered or not.

The datasheet parameters for both parts are pretty similar.

Typical propagation delay is 30ns for both parts at VCC=10V. The output sink/source current is 2.6mA typical for both parts.

If they both parts can switch at the same speed, and drive the same loading, whether they are buffered or not may make little difference.

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    \$\begingroup\$ I think the quote should include more words. The chips are intended for applications where TTL drive and logic level conversion of circuits () and buffers are not required. So in cases where you don't need buffering. Because the "U" in 4069UB means unbuffered. The schematic is also of an unbuffered inverter. Everything implies it is not a buffered but an unbuffered inverter. \$\endgroup\$
    – Justme
    Sep 22 at 20:14
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    \$\begingroup\$ As @Justme pointed out, you misread the datasheet. That paragraph tells you that you can use these gates when you don't need buffered ones, since they are unbuffered. That sentence should read as "These devices are intended (...) where the (...) capabilities of circuits such as the CD4009 and CD4049 hex inverters and buffers are not required". The bold part is what "is not required", with "hex inverters and buffers" being a specification of what those part numbers actually are. \$\endgroup\$ Sep 23 at 19:36
  • \$\begingroup\$ @LorenzoDonatisupportUkraine I will probably edit my answer then. But interestingly enough, the propagation delay and drive strength of the CD4069UB and CD4069B appear to be identical in the datasheets. If they can switch at the same speed, and drive the same loading, whether they are buffered or not seems to make little difference. \$\endgroup\$
    – user4574
    Sep 24 at 21:39
  • \$\begingroup\$ Where did you get the CD4069*B* datasheet? You only posted a link to the datasheet for the UB version. The table posted by @johnatanjo in his answer makes it clear that the propagation delay is smaller for UB devices. \$\endgroup\$ Sep 25 at 13:27
  • \$\begingroup\$ @LorenzoDonatisupportUkraine I didn't save the link to the datasheet I was quoting from, and it is generally hard to find specific info on the CD4069B. But you can look at page 57 of "CMOS Logic Circuits For Design Engineers" Third Edition published by Texas Instruments in 1975. Here it lists the propagation delay of the CD4069B as 40ns typical and 80ns max at VCC=10V. I guess the numbers will be a bit different depending on what datasheet one finds. bitsavers.org/components/ti/_dataBooks/… \$\endgroup\$
    – user4574
    Sep 26 at 3:41

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