Propagation delay vs max flipping frequency of a comparator

Question

Almost all datasheets of comparators will show their propagation delay, which means the time it takes for the input pin's change to be reflected by the output.

However, if we have a high-frequency signal that's changing faster than the propagation delay, what will happen? I assume it ultimately depends on the exact implementation of the chip, but is there any way to know the details?

The background is about implementing hysteresis in high-speed comparators to prevent multiple flipping on the slow rising edge due to noise.

I figured out that if the noise bandwidth is higher than 1 / propagation delay, then just a positive feedback from the output of comparator to the positive input cannot always guarantee the output to be multiple-flipping-free.

Is there any way to solve this problem without switching to comparators with a much lower propagation delay?

Answer 1

However, if we have a high-frequency signal that's changing faster than the propagation delay, what will happen?

If the signal amplitude exceeds the hysteresis, the output will switch at the input frequency. The rise and fall times will determine if the output switches cleanly.

...to prevent multiple flipping on the slow rising edge due to noise.

Input noise must be kept within the hysteresis range usually by low pass filtering.