I'm designing a test PCB containing a CPLD that's going to be used for boundary scan. I'm now calculating how much power the circuit will draw and wonder if/how the boundary scan cells interact with the IOs of the CPLD. Is the current sourced/sinked from the CPLD power net and simply turned high or low from the boundary scan cell?

Edit: The CPLD I'm going to use is a XCR3064XL.

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  • \$\begingroup\$ Are you asking about some random CPLD, or a specific one with a data sheet? \$\endgroup\$
    – Neil_UK


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