Why can logic gates connected together behave the same as single logic gates? For example: picture1

When inputs A and B are high, the AND gate output is high when it's by itself.

But when it is connected to an OR gate (inputs A, B, and C are high) and the gate is still the same, does this OR input affect the AND gate's output impedance?

Or does the OR gate not disturb the AND gate?

  • \$\begingroup\$ Those gates are active components, electrically they separate output from input. If you look at a gate from the output side, you don't know/consider (electrically) what is behind (i.e. the inputs). \$\endgroup\$ Sep 29, 2022 at 6:59

2 Answers 2


Logic is designed with suitable input and output characteristics that yes, the input of a driven gate does not disturb the output of a driving gate, at least, up to a point.

There is a parameter known as 'fan-out', which specifies how many gates a driving gate is guaranteed to be able to drive. Often it's at least 10. Different logic families may have different fanouts.

For the details of how this works, you need to go into the analogue detail of how the gates are built, what the logic threshold voltages and current requirements are at the input, what voltages the outputs can reach at what current. But if you stay within one logic family, and observe the fan-out limits, timing limits, supply and ground cleanliness limits, then it all 'just works'.

If you want to mix logic families, drive logic from 'analogue' sources, drive logic from slow edges, use logic to drive other things, then you need to read the data sheets and ensure that voltage levels, current requirements, edge rates, are compatible.

  • \$\begingroup\$ Indeed, this is the exact purpose of gates-as-building-blocks: we want to be able to ignore the analogue properties and consider only the digital properties when we're designing as logic. \$\endgroup\$
    – jonathanjo
    Sep 29, 2022 at 8:47
  • \$\begingroup\$ Note also that for "some" MCU, fan-out can be "programmable". thebox.myzen.co.uk/Raspberry/Understanding_Outputs.html \$\endgroup\$
    – Antonio51
    Sep 29, 2022 at 9:04

The logic gate output stage used in nearly all gates is the push-pull driver, shown below.

There are other output stages, such a three-state push-pull drivers and open-drain, but their use is a tiny minority within the vast number of logic gates manufactured and deployed.

The push-pull driver connects its output to a supply rail or a ground rail through one of the two low-impedance FETs. In either state, the output impedance is low, with a very high source or sink current compared to the tiny load currents taken by the driven logic gate inputs.

For example, the drive current capability may be 10 mA source or sink, while the five loading gates might take 25 uA which is 1/400th of the available drive current.

So the output drive behaviour seen at a logic gate when off-load or when driving five gate inputs is almost identical.

This ignores the transmission line effects between the gates, as the connections and speeds will vary greatly across all the different circuit designs. But it explains a nominal case.

Note that this considers the logic families since the mid-80's or so. If you go back far enough, you'll find gates that had weak drives and took large input currents. But their percentage of the circuits in use out in the world is now almost zero.

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