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I have a question that I am assuming has a very easy answer (hopefully). I am trying to turn on and off the power to a pcb really fast, on the order of 1us. My problem is that my board has some bypass caps which slow my rise and fall time of my switch, on the order of 1ms. I am using a simple NMOS switch with the part FDBL0090N40. My mosfet in my simulation is similar and was already in the LTspice library, and the 10uF load represents my board.

Simple Switch

My thought is that when gate voltage is applied, there is a ground path to quickly dump the 10uF load, as seen in the fast discharge of the blue trace. Now, I was thinking that the 22uF would provide the charging transient current to give a quicker charge. The caps have a 50m ESR. I guess I could try a push pull configuration, but I was hoping that this simple implementation would work. The 22uF are those spot welded stacked ceramic caps that I have in my collection. I didn't want the high ESR of electrolytics.

Thank you

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    \$\begingroup\$ What's the purpose of the 10k resistor? That's going to limit how quickly you can charge the capacitors. \$\endgroup\$
    – Hearth
    Commented Sep 30, 2022 at 23:01
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    \$\begingroup\$ (Also note that you're not driving that MOSFET fully on. But that's not really a problem here, as you're trying to waste energy and it's all in a single big pulse, so efficiency and heating aren't a concern.) \$\endgroup\$
    – Hearth
    Commented Sep 30, 2022 at 23:04
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    \$\begingroup\$ If you decide to go with a push pull, just be sure that your pcb is designed to handle (near) grounding the positive (I assume) power rail. Some circuits do not appreciate current flowing backward. \$\endgroup\$
    – Math Keeps Me Busy
    Commented Sep 30, 2022 at 23:18
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    \$\begingroup\$ To what end? If the board was apparently made to sustain itself for some milliseconds (power disconnected), are you trying to shut it down faster than that? Is that a good thing? Should its outputs be gated instead? Related, is this a power glitching procedure? (That usually involves partial, not complete, shutdown, however.) \$\endgroup\$
    – Tim Williams
    Commented Oct 1, 2022 at 0:07
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    \$\begingroup\$ @TimWilliams. You are correct, this is for power glitching to test effects on a chip \$\endgroup\$
    – Frank
    Commented Oct 1, 2022 at 0:18

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