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The majority of mains power sensing devices I've seen (both commercial products and ICs) utilise a current sensing transformer. Many of them also calculate or estimate power factor. However, the phase error specified in the datasheets of almost every current transformer is in the order of ±15° when operated with the recommended burden resistor.

If the magnitude of phase error between the real current and the sensed current is ±15°, and if my calculations are correct, that implies that a load with a power factor of 0.86 could be reported as anywhere between 0.71 and 0.97, which is hardly a useful level of accuracy.

My guess is that in reality the error typically only manifests as additional lag on the current waveform when measuring 50-60Hz mains, rather than lead, which would mean a range of 0.71-0.86 for a power factor of 0.86. This is better, but still pretty bad.

Is this just accepted as a limitation of the approach, or am I missing something here?

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  • \$\begingroup\$ How do you know that the phase error isn't compensated for in the code? \$\endgroup\$
    – Andy aka
    Oct 3, 2022 at 16:03
  • \$\begingroup\$ @Andyaka Is the phase error constant, or otherwise calculable? My guess is there's some proportionality to the dI/dt, which seems like a catch-22 in terms of being able to correct for it. \$\endgroup\$
    – Polynomial
    Oct 3, 2022 at 16:07

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Mind, I don't know about the particulars of mains-frequency CT design.

I suspect they just don't want to measure it. Consider what ±15% means: it could be inductive or capacitive. Now, either case is plausible -- there's a LOT of wire on there to make up the some thousands of turns needed for low frequency use -- but it beggars belief that the phase could be, not only inductive or capacitive, but that far out, at mains frequency.

I suspect they just don't want to characterize it for every part manufactured.

There's also the difference between commercial grade and revenue grade CTs.

You can also look at the datasheet and see if that's the phase shift over the full rated bandwidth (say, some Hz to kHz?), which might have cutoffs of such phase angle, or flatness within some dB. This is a more sensible explanation, really. But without a datasheet, who knows what they meant.

Even if all of these meanings were true in the worst case, it's still possible to use such a crummy part. A calibration step would be necessary, perhaps a fairly messy one (there are multiple variables to solve for), and repeated for every unit (as the variation between individual components might be too great with respect to the desired tolerances and frequency range). But it's not a big deal to insert an inverse filter network, in DSP, to compensate for the frequency response (amplitude and phase shift) of the sensor. The amount of computing power required to do this, isn't even beyond the reach of say an ATMEGA microcontroller (i.e., entry level Arduino). The calibration should only have to be calculated once, saved into EEPROM or what have you, and that's that.

Note that frequency response calibration increases the noise floor in a nonuniform manner, as you're increasing gain at that frequency to compensate. Having a flat analog and digital signal path may be preferable say for instrument design or revenue purposes, while calibration (or just winging it) might be fine for a device simply measuring its own power for control purposes.

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