# Constant voltage at MOSFET source terminal

I have simulated high side N channel enhancement MOSFET (BSC12DN20NNS3) circuit which has Vth of 3.6V.

according to the theory , when gate voltage is greater than 53.6V , MOSFET turns on and when gate voltage is below 53.6V , MOSFET should be in cut off and acts as open switch .

but in simulation and reality,source terminal is constant at Vg-Vth (20V-3.6V=16.4V) irrespective of drain voltage.

what could be the reason of constant source voltage (Vg-Vth) even though MOSFET is in cutoff ? is it leakage current that causing voltage drop at source terminal ?

• Just as a really general comment, you normally want to draw schematics so they flow from input on the left toward output on the right, not vice versa. Oct 12, 2022 at 18:59
• Where did you get the figure of 53.6V from? In any case, it's gate-source voltage that controls the MOSFET. The circuit is doing exactly what I'd expect it to. Oct 12, 2022 at 19:03
• @Finbarr . 50V is at the drain and to turn on the high side switch , i need to apply drain plus threshold voltage which is 53.6 . How MOSFET is turned on when the Vgs is below Vth in above case. ? Oct 12, 2022 at 19:20
• You need to apply source plus threshold voltage to the gate. Oct 12, 2022 at 19:27
• A transistor (MOSFET or BJT) only knows the difference in voltlages betweens its pins - it has no idea where you think Ground is, or where its pins are relative to Ground. Oct 12, 2022 at 19:40

Ronnie, you are not analysing this correctly. If the MOSFET was deactivated, its source would be at 0 volts (due to resistor R1) and, this cannot happen whilst V2 is greater than a few volts. In other words, you circuit is a source follower; the source lags the gate by a few volts so, if the gate were (say) 20 volts, the source would be about 16 or 17 volts (maybe a tad lower of course but not by more than a couple of volts).

• Doubts are , In above circuit Vgs is not greater that Vth then how Mofet has channel formed for conduction ? How source is following gate voltage when both are isolated ? Oct 12, 2022 at 19:38
• The source cannot be naturally at 0 volts if the gate is at (say) 20 volts. If it were, the MOSFET would be fully activated and this means the source cannot be at 0 volts hence, the MOSFET (in a source follower situation) has to be conducting just enough current to create enough gate-source voltage to allow that conduction. Have a think about it a bit more and look up source follower circuits and explanations. Oct 12, 2022 at 20:03
• Yes i understood the concept. Why the Voltage gain is not one but somewhere around 0.85 ? Oct 13, 2022 at 15:49
• It can never be unity gain, the gate always needs to be a few volts higher than the source in order to create sufficient $V_{GS}$ for the drain/source current needed by the load @Ronnie Oct 13, 2022 at 15:58

I've redrawn your circuit a little more conventionally, and added a voltage divider feeding the gate, so we can easily run a sweep to see what happens as we vary the gate voltage.

simulate this circuit – Schematic created using CircuitLab

If we do a sweep, varying R2 from 0 to 10k, we get a plot like this for Vout:

Your gate voltage of 20 corresponds to R2 being around 900 ohms or so (in other words, this is pretty much just demonstrating what Andy Aka already said, but it seemed like the simulation might add a bit of useful information about how the circuit acts).

Yet another way of showing how the circuit tries to keep the gate-source voltage constant (negative feedback).

X-axis is the voltage at the gate relative to ground.
Y-axis is the voltage at the source relative to ground (green trace) and the voltage between the gate and source.

Notice how V(g,s) stays fairly constant around 3.7 volts. When V(g) reaches a certain value (about 54V), the circuit will no longer regulate and the transistor goes in to saturation.

• Why the Voltage gain in this source follower circuit is not 1 but around 0.85 ? Oct 13, 2022 at 15:50
• First off, emitter and source followers have a AC gain less than 1 (usually fairly close to unity). For this DC circuit you have the gate-source voltage drop to contend with. A level 1 approximation: G = V(s) / (V(s) + 3.7), or G = (V(g) - 3.7) / V(g), where 3.7 is the gate-source voltage difference which will change slightly depending on the current flowing through the transistor. Hence the DC voltage gain is dependent on V(s) or V(g).
– qrk
Oct 13, 2022 at 17:30