I'm designing an envelope generator for a sort of mini synthesizer I'm currently working on. I want the envelope signal to evolve (rise or decay, depending on the SPDT switch) only when the switch (SW1) is closed. The first part of the circuit (RV1, C1, R1 and D1) handles the rising envelope signal. The first op-amp ensures that the capacitor discharges only when the switch is open (through D1 and R1) and buffers the signal. That signal is then inverted to generate the decay envelope signal. The problem is that, when the switch is open, the output of the first op-amp, which should be very close to ground (typically 5mV according to LM324 datasheet), is at about 600mV. It surely can't be an impedance problem, the output impedance of the buffer is very low and the input impedance of the inverting amp is 10k. However, if I swap R2 and R3 for 100k resistors, the offset is minimized (I get about 60mV instead of 600mV). Why does this happen? Does it have to do with the inverting amplifier being biased at 2.5V?

Edit: LM324 power supply voltages are 0V and 9V (9V single supply).

Envelope generator schematic

  • \$\begingroup\$ When you measure 600mV at the output, what do you measure at the input? \$\endgroup\$
    – brhans
    Oct 19, 2022 at 23:29
  • \$\begingroup\$ And the power supply voltages to the are what, 0V and 5V? \$\endgroup\$
    – Justme
    Oct 19, 2022 at 23:59
  • 2
    \$\begingroup\$ You'll probably have better luck with a true rail-to-rail opamp that can operate at 5V. \$\endgroup\$
    – td127
    Oct 20, 2022 at 0:49
  • \$\begingroup\$ It is possible that the 2.5 V bias on U2B will cause its output to be 5V and this will cause a 250 uA current into the output of U1A. This might be enough to cause a 600 mV offset on its output. \$\endgroup\$
    – PStechPaul
    Oct 20, 2022 at 1:36
  • \$\begingroup\$ @brhans At the input of the buffer (U1A) I measure almost exactly 0V (1-2mV). \$\endgroup\$ Oct 20, 2022 at 21:18

2 Answers 2


When the LM324 output is sinking current, it can only sink a few tens of uA before the (nominal) fixed 50uA current sink to ground is overwhelmed and the output voltage increases to about one diode drop above the negative rail minimum.

Note that the data sheet specifies Vol with a 10k ohm resistor to ground (the negative rail), which is not your situation since current through R2 + R3 must be sunk. 5V/200k is 25uA. 5V/20k is 250uA.

From the TI data sheet:

enter image description here


The lower (pnp) output transistor of the buffer (U1A) is dropping about 0.6 V across its base-emitter junction when you use 10k resistors. When using 100k resistors there is much less current being sunk through that buffer's pnp output drive transistor and so its base-emitter voltage drop is much less than 600 mV.

  • 1
    \$\begingroup\$ The LM324 has a maximum VOL of 20 mV into 10k, so I don't think that's the problem. More likely is the mismatch of impedance on the + and - inputs, such that the bias current creates a differential voltage on the inputs. This should be more pronounced for the 1 Meg input resistor on U1A, but the maximum bias current is 200 nA which would cause 200 mV offset. It is good practice to use equal resistances to address this issue. But it does not fully explain the observed behavior. \$\endgroup\$
    – PStechPaul
    Oct 20, 2022 at 1:17

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