# How does this switching power supply sense line work?

I saw this design and was going to use it for my design. I have a few questions on how this was designed. I am showing two pictures. One is a simplified photo and the other is a more detailed photo. I have questions on both

For this image, the TPS7H4001 is provided the VCCint voltage for the FPGA and also sensing the voltage at the FPGA.

1. What is the purpose of the 50 ohm resistor? I am guessing it is somehow there to match the impedance of the PCB trace but unsure if its needed?
2. What are the purposes of the two 0 ohm resistors? I am guessing they would be changed to a different value if needed once the board gets tested but not sure what would dictate that.

Now here is the more detailed drawing that shows a couple of depop resistors.

So for this circuit, they add two large resistors but depop them.

1. What would be the purpose of these large resistors?
• Do both blocks share the same ground? Oct 21, 2022 at 13:45
• Yes, both blocks share the same ground Oct 21, 2022 at 14:07
• Removing the output choke and caps from the diagram doesn't make it more readable. Instead, makes the diagram unclear. Now I can't imagine where the 50R is connected to: After the choke or before the choke (to PH node)? Please edit the diagram accordingly. Oct 21, 2022 at 15:32
• Updated per your recommendation Oct 21, 2022 at 15:43
• @Andyaka yeah, there were no 953k resistors in the first image before the update. Oct 21, 2022 at 16:05

What is the purpose of the 50 ohm resistor. I am guessing it is somehow there to match the impedance of the PCB trace but unsure if its needed

That 50R resistor might be placed as a dummy load to force the converter to run in CCM even there's no current drawn from the FPGA side.

What are the purposes of the two 0 ohm resistors? I am guessing they would be changed to a different value if needed once the board gets tested but not sure what would dictate that.

The VSENSE pin is the sampling point for the converter's internal control circuitry for output voltage regulation. The output voltage is set by the resistors Rtop and Rbottom:

$$V_o=\Big(1+\frac{R_{top}}{R_{bottom}}\Big)\cdot V_{ref}$$

where Vref is the internal reference voltage, which is 0.6V for TPS7H4001.

Those 0R resistors could be placed as dummy resistances for RnD purposes such as fine adjustment of the output voltage i.e. for example, if the required top-side resistor is 6.91k then you can place 6k8 and 110R in series, but you can start with 6k8 and 0R to see what happens and replace that 0R with something else for fine adjustment if necessary.

What would be the purpose of these large resistors?

Those resistors are marked as "Depop" which possibly means "depopulated", "not populated" or "not fitted". So most likely those resistors won't be used in practice.

Those resistors will interact with each other (and with the resistance between VCCINT and VCCINT_SNS node, if any) and might affect the set output voltage. Also, assuming the upper and lower resistances are relatively low, if somehow the FPGA circuit is not connected/fitted then the set voltage might be extremely high because those two 953k resistors will set a very high upper resistance and therefore the converter will try to set the output voltage as high as possible i.e. basically equal to the input voltage.