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I have this college assignment where I was asked to implement a FPU (floating point unit) that adds numbers using only Verilog, but that's not a problem here.

The problem is that I must use a 32-bit signed adder inside the FPU to add numbers only and that adder has to be one of the following:

  1. Verilog (‘+’) version of adders
  2. Ripple Carry Adder
  3. Carry Save Adder
  4. Carry Look-Ahead Adder
  5. Carry Increment adder
  6. Carry Skip Adder
  7. Carry Bypass Adder
  8. Carry Select Adder

So I must implement the FPU using one of the above adders (supposed to be the best in this situation) and I am supposed to tell my professor why I chose that specific adder.

I don't know which adder suits the FPU best as there is always a trade-off between space and speed.

Any help with determining the best one in my situation would be appreciated.

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    \$\begingroup\$ There is no 'best', unless you also know the specifications for the resulting FPU - lowest power possible, lowest area, highest speed - are all easy ones to interpret. Best balance of speed and power? Now there's a tricky one, where you would have to weight how much they're worth to the customer (your prof). Manufactuers often handle this by offering a fast one, and a cheap one, and let their customers decide on the relative values. I suspect that as long as the reason you give for your choice is founded in good research (it's the fastest, it's the cheapest), the prof will be happy. \$\endgroup\$
    – Neil_UK
    Oct 27, 2022 at 8:54

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I have this screenshot of comparison between different adder architectures. I don't remember the title of the paper but hope this gives some insight.

Source: https://www.researchgate.net/publication/264634715_Hardware_Implementation_of_32-Bit_High-Speed_Direct_Digital_Frequency_Synthesizer enter image description here

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