This is a really basic topic but it's getting me confused. The truth table for any gate remains the same for both positive and negative logic, right? like for a NOR gate the truth table would always be,

x    y    x nor y  
F    F       T
F    T       F
T    F       F
T    T       F

for both positive and negative logic. right?
Then for a negative logic nor gate the truth table would be,

 x       y        x nor y  
1(F)    1(F)       0(T)
1(F)    0(T)       1(F)
0(T)    1(F)       1(F)
0(T)    0(T)       1(F)

now look at this. the table for negative logic nor says 1 nor 0 = 0. So what am i missing?

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    \$\begingroup\$ Your link points to some books that I don't have on my shelf, and if I had I would not look in them without you providing a page number. The truth table of a gate remains constant when it is expressed in high and low (in the electrical sense), but when you assign high==0 you will get one truth table, you will get a different table when you assign high==1. \$\endgroup\$ – Wouter van Ooijen Apr 1 '13 at 14:59
  • \$\begingroup\$ the link points to pg 64 of 'Digital logic and computer design' by M. Morris Mano on Google Books. The link works just fine, i don't think you'll need to have it on your shelf. I updated with a cleaner link anyway. :) So, if the truth table is the same, my point is right? the 2nd truth table is the right one for negative logic nor gate? What about the one in the book? is it in some different notation? \$\endgroup\$ – Shashwat Black Apr 1 '13 at 16:02
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    \$\begingroup\$ "the link points to pg 64" maybe on your PC, but not on mine. \$\endgroup\$ – Wouter van Ooijen Apr 1 '13 at 17:04
  • \$\begingroup\$ This is a well known Google Books phenomenon, of pointing browsers in different geographical locations to different views, based on Google's (mis)interpretations of local copyright laws. In this case the book in question hasn't actually been out of copyright for 150 years so they may be legally justified; however it does make helping the questioner harder. The author's name is ringing alarm bells at the back of my mind from a recent post here (can't find it atm) so I wouldn't eliminate the possibility of a mistake in the book. \$\endgroup\$ – Brian Drummond Apr 1 '13 at 17:09
  • \$\begingroup\$ i'm sorry.. didn't know about that.. And Wouter's answer made it clear.. the book isn't wrong, the truth table isn't wrong, i was interpreting the models wrong.. thanks :) \$\endgroup\$ – Shashwat Black Apr 1 '13 at 18:02

You are confusing logical and electrical models.

A NOR gate is a NOR gate, with the truth tables as you show in your question. The entries in that table are logic values. Logic values are mathematical constructs, that have no intrinsic relation with the real world.

When you take let's say a 74HC00 chip it contains 4 2-pinput gates. With the by-convention standard assignment of voltage levels to logic values (0V=0 5V=1) those gates behave as NANDs. But when you use the less common assignment of 0V=1 5V=0 the same gates behave as NORs.

The table below is taken from the 74HC00 datasheet. It shows the truth table for a single gate, but note that it states that this table holds only when you use the standard assignment of voltage levels to logical values.

enter image description here

Summary: there is no such thing as a 'negative logic NOR gate'. There are NAND and NOR gates, which are mathematical constructs, and there are physical circuits. Whether a specifc circuit implements the NAND or the NOR function depends on your choice of which voltage level correspons to which logical value.


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