# What's with the operating voltages: 5V, 3.3V, 2.5V, 1.8V, etc

Integrated circuits seem to have standard voltages of 5V, 3.3V, 2.5V. 1.8V...

• Who decides these voltages?
• Why do smaller devices require lower voltages?
• Long story short, the voltages are dictated by the process the silicon is fabbed on. As the process size gets smaller, so does the breakdown voltage, and therefore operating voltage (Though there are many other process considerations). – Connor Wolf Nov 9 '10 at 7:48
• I just want to point out that a number of the answers here (even some with lots of upvotes) are just blatantly wrong, or at least uninformed guesses. – Connor Wolf Nov 9 '10 at 7:49
• @Fake Name, correct them with your comments then. – Thomas O Nov 9 '10 at 12:56
• Not sure about 5V, but people/companies on JEDEC and semiconductor roadmap committees probably argued/compromised over some of the lower voltages. – hotpaw2 Aug 17 '11 at 0:45

New voltages have often been chosen to give some degree of compatibility with what came before them.

3V3 CMOS output levels were compatible with 5V TTL inputs, for example.

A lower VDD is required as the gate geometry shrinks. This prevents damage to the CMOS gate oxide and minimizes leakage. When the fabs switched from 0.5um to 0.35um, the thinner gates could only handle potentials up to 3.6V. That led to supplies at 3.3V +/- 10%. With the switch to 0.18um the voltage was reduced further to 1.8V +/- 10%. In the latest processes (e.g. 45nm), the gates are made of high-k dielectrics such as halfnium to reduce leakage.

That's a combination of several factors:

• conventions - it's easier to design a system when the chips are supplied with the same voltage. Even more important is that the supply voltage determines voltage levels of CMOS digital outputs and voltage thresholds of inputs. The standard for chip-to-chip communication used to be 5V, nowadays it is 3.3V, although recently there was an explosion of low voltage swing serial communication interfaces. You could say that here "the industry" decides the supply voltage.
• CMOS manufacturing process limitations - as the MOS transistors shrink, so does the thickness of the gate insulation material and the channel length. As the result the supply voltage has to be lowered to avoid reliability issues or damage. To maintain a "convenient" supply voltage at I/O interfaces (like 3.3V - see above), these cells are made using different (bigger and slower) transistors than the core of the chip. Here the "fab" (whoever designed the manufacturing process there) decides the voltage.
• Power consumption - at each process generation a chip can accommodate 2x more transistors, running at x2 higher frequency (at least that was true until recently) - if nothing is done that gives 2*2=4 times increase in power consumption per unit area. To reduce it the supply voltage is (or was) scaling down proportionally to transistor sizes, leaving 2x increase in power/unit area. Here the chip designer's voice is important.

Recently the picture got more complicated - the supply voltage can't easily scale down because of limited intrinsic transistor gain. This gain presents a tradeoff (at a given supply voltage) between the "on" resistance of the transistor channel, which limits switching speed, and "off" resistance that causes current leakage through it. That's why core supply voltage settled at around 1V causing the speed of new digital IC chips to grows more slowly and their power consumption to grows faster than it used to be. Things are getting worse if you consider manufacturing process variability - if you can't position transistor switching threshold voltage accurately enough (and as transistors are getting smaller it becomes very difficult) the margin between "on"/"off" resistances disappears. The variability is an engineering problem so, at least in theory, it is fixable, but limited gain of MOS transistors is something we have to live with until we get better devices.

• "I want to say one word to you. Just one word... Are you listening?" Graphene. The MOSFET is dead; long live the graphene FET... up to 100 GHz. – Eryk Sun Nov 8 '10 at 17:53
• @eryksun - You invent the process to create graphene wafers and do photolithographic fabrication of circuitry on them. I'll do the marketing for you. Ok? – Connor Wolf Nov 9 '10 at 7:45
• @eryksun: You must be a Popular Science writer; always talking up the "next big thing" without any consideration of the feasibility or cost. – Nick T Nov 9 '10 at 18:45
• @Nick_T Just because I think graphene is the "next big thing" doesn't mean I think it's easy. @Fake_Name It's not my area, but I've seen an increasing number of articles on graphene that show steady progress -- among other competing technologies. I was just offering a potential 'better device' with a joking allusion to the famous line about plastics in "The Graduate". – Eryk Sun Nov 10 '10 at 8:10
• "up to 100 GHz" - so that could be 50Mhz then? – shuckc Jun 29 '12 at 16:56

The voltages appear to follow a pattern:

• 3.3v = 2/3 of 5v
• 2.5v = 1/2 of 5v
• 1.8v = ~1/3 of 5v (1.7 would be closer to 1/3, this seems to be the only oddball)
• 1.2v = 1/4 of 5v
• If you want to go about it like that, I'd rather think of it from a similar point of view as IC feature shrinks, each decreasing by a factor of sqrt(2)/2. Still not perfect, but within 10% and it makes a lot more sense than your arbitrary fractions :P – Nick T Nov 9 '10 at 18:42

"Why do smaller devices require lower voltages?" Smaller ICs have less surface to get rid of the heat. Whenever a bit toggles somewhere in an IC, a capacitor has to be charged or discharged (i.e. the gate capacitance of a CMOS transistor). Although the transisotrs in a digital IC are usually very very tiny, there are a lot of them, so the issue is still important. The energy stored in a capacitor is equal to 0.5*C*U^2. Twice the voltage will cause 2^2=4 times the energy that has to be used for every MOSFET's gate. Therefore, even a small step down from, say, 2.5V to 1.8V will bring a considerabe improvement. That's why IC designers didn't just stick to 5V for decades and waited until the technology was ready to use 1.2V, but used all the other funny voltage levels in between.

Short answer: The geeks at TI said so, and everyone else followed suit by making compatible or competing products.

5 Volts was chosen for noise immunity. Early chips were power hogs, causing ripple in the power supply every time something switched that designers would try to overcome by putting a capacitor on the supply pins of every chip. Even so, an extra 2.4 volts of headroom gave them a cushion against going into the forbidden area between 0.8V and 2.2V. Also, the transistors caused ~0.4 V voltage drop just by their operation.

The supply voltages have been dropping to extend battery life, and because the chip dies have been shrinking to make your portable devices smaller and lighter. The closer spacing of the components on the chip demands lower voltages to prevent excessive heating and because the higher voltage could cross through the thinner insulation.

• Wouldn't the voltage fluctuation caused by switching be proportional to the supply voltage if the supply impedance is similar? – Nick T Nov 9 '10 at 18:54

Whoever makes an IC decides on the voltages it needs.

In the olden days someone started using 5V for digital logic and that stuck for a long time, mainly because it's much harder to sell a chip that needs 4V when everybody is designing with a lot of chips that run on 5V.

iow: The reason that everybody tends to use the same voltage is not so much a matter of them all choosing the same process as it's a matter of them not wanting to be cursed for using "unusual" voltages by the designers who use their chips.

Switching a signal at a certain speed takes more power if the voltage is higher, so with higher speeds you need lower voltages to keep the current down, that's why the faster, denser, modern circuits tend to use lower voltages than the old chips.

Many chips even use 3.3V for i/o and a lower voltage, like 1.8V for the internal core.

Chip designers know that 1.8V is an oddball voltage and will often have an internal regulator to provide the core voltage for the chip itself, sparing the designer from having to generate the core voltage.

For an example of the dual-voltage situation take a look at the ENC28J60 which runs on 3.3V, but has an internal 2.5V regulator.

• dsPIC33F's and PIC24F's have 2.5V regulators to run the core at, some AT32's have 1.8V regs. – Thomas O Nov 8 '10 at 10:10
• This doesn't explain how everyone chose the same voltage though? I know manufacturers have to use similar voltages, but why did they pick them in the first place? – Thomas O Nov 8 '10 at 10:10
• I have no idea, my guess is that there were specific reasons for every voltage that the IC designers chose, when they first chose them, but that the strongest reason that "everybody" seems to use the same voltage is that "everybody" else seems to use that voltage. – dren.dk Nov 8 '10 at 11:13
• @thomas o Have you considered going into engineering history? Seems like you are interested in this. – Kellenjb Nov 8 '10 at 15:16

The voltages are dictated by the physics of the materials (semiconductor materials anyhow) and the processes used in the making of the chip. (I hope I'm using the right terms here...) Different types of semiconductors have different gap voltages - essentially the voltage that 'activates' them. They can also optimize the structure of the chip to allow lower voltages to work more reliably when they do layouts (I believe).

It's not so much that smaller devices require lower voltages, it's that they've designed them to use smaller voltages because less voltage means less heat dissipation and potentially faster operation. It's easier to have a 10MHz clock signal if it only has to go between 0V and 1.8V.

• Charging the gate capacitance to 0.9*Vdd takes 2.3 time constants, regardless of Vdd. A smaller gate has less capacitance, yielding a shorter RC time constant and less 0.5C*V^2 switching energy. Moreover, minimizing the leakage currents for a smaller gate requires a lower gate voltage, which further reduces power consumption. On the other hand, a higher gate voltage increases the charging current in fanout (decreasing R in the time constant). Thus overclockers increase Vdd -- at the expense of power consumption and more elaborate cooling. – Eryk Sun Nov 8 '10 at 15:01