# Concerns with operation of ZVS circuit

I'm looking to build my first ZVS circuit to use for future projects. But before doing so I want to fully understand how and why the circuit works the way it does. So I built a model in LT SPICE which looks as follows.

My main issue is understanding how the current through L3 and C1 is so large (In my case around 60A peak to peak).

## My Understanding

So let's say M1 turn on first pulling the voltage on the left rail to ground. Then current will flow like this:

Then the voltage on the right rail swings up and down and when it reaches 0V, the gate of M1 is pulled down through D2. So, I tried to simplify the circuit in this stage where M1 is on by drawing a new schematic as follows:

I thought this would give the same 30A peak as the ZVS circuit for each cycle. Obviously, there is something else going on here which explains why the current in the ZVS circuit is so much larger than a simple LC circuit but I don't know what it is.

## My Concerns

What is so special about the ZVS circuit as opposed to an LC circuit which allows it to produce such large currents?

Why doesn't this circuit violate conservation of energy? I mean the power through L3 in my simulation reaches peaks of 600W whilst the battery power barely reaches 3W. How is this possible?

What is so special about the ZVS circuit as opposed to an LC circuit which allows it to produce such large currents?

Nothing is so special here. It is the LC parallel tuned circuit that can build-up a massive circulating current. Your simulation used a 12 volt DC source and that won't progressively build up the circulating current that you see on your oscillator. AC stimulation of a parallel tuned circuit: -

Notice the green trace in the lower graph; it is current through R1 and notice also how it "dies" away as time progresses yet inductor and capacitor currents get larger and larger. This is that process in action.

Why doesn't this circuit violate conservation of energy? I mean the power through L3 in my simulation reaches peaks of 600W whilst the battery power barely reaches 3W. How is this possible?

Because the sinusoidal voltage across the parallel tuned circuit is 90° out of phase with the current circulating. This means a high VA but zero power. Hence there is no violation.

• Right. Yes, my simulation does show that the voltage and current are 90 degrees out of phase so that makes sense. I'm not understanding how the current through the LC circuit "builds up" over time. How does the current grow with each switch of the mosfet's until it reaches the 60A pk to pk? Commented Oct 30, 2022 at 11:11
• @SwissGnome you need to study resonant circuits to fully understand that. Have you seen the Tacoma bridge collapse video: youtube.com/watch?v=y0xohjV7Avo <-- the same equivalent mechanisms are at play in a tuned circuit and, sometimes, they can cause the components to burn (or crash). Commented Oct 30, 2022 at 11:17
• Yes I have seen that actually. Amazing! Perhaps I do need more knowledge to fully understand the circuit. I learnt about resonace through the analogy of pushing a child on a swing. Although, trying to relate this to the waveforms of mosfet switching in relation to current through the LC circuit is much more challenging for me. But I will keep trying, thank you for your help. Commented Oct 30, 2022 at 11:22
• All the MOSFETs are doing is supplying a little energy at the right time to keep the circulating energy in the tuned circuit topped-up. Commented Oct 30, 2022 at 11:25
• Right. Makes a lot more sense now. Thank you! Commented Oct 30, 2022 at 11:41

The difference is your simulation runs it once, and shorts out the supply the rest of the time (Actually, it's a quirk of LTSpice that it simulates at all: a voltage source shorted out by ideal inductors has a divergent solution i.e. draws infinite current at DC; LTSpice puts in source resistances for you, to oh-so-helpfully prevent this.)

Whereas the real circuit runs alternating half-waves, more or less, forever.

There are two methods to approach the analysis of this circuit, used sequentially:

## Small Signal Approximation

At start, say we assume everything is at zero, then the supply is energized. Since everything is perfectly symmetrical (in the simulator, it can be; it reality, it won't), all node voltages come up together, and currents start to flow. Since the two transistors see identical voltages, we can treat them as identical and in parallel.

The first steady-state condition, then, will be with the transistors in "diode strapped" mode, i.e. Vgs = Vds ≅ Vgs(th). The actual values of course will differ because of the diode drop (putting the gates higher than drains), and as current rises, Vgs rises to draw a correspondingly higher drain current.

This condition persists until transconductance rises high enough to amplify noise in the loop, or any initial imbalance that hasn't yet blown up.

Indeed, it's worth considering this condition for a bit, because it can happen that symmetry gets restored, oscillation stops ("quenches"), and the transistors sit there cooking in their own juices. This usually requires an extremely heavy load (low load resistance), or perhaps a short circuit, and the subsequent rapid destruction of the transistors, power source or both, is the major downside to this circuit -- aside from the lack of any control at all. (But for something so simple, that's hardly unexpected. That said, it is easily controlled by varying supply voltage, for instance; well, easier said than done, perhaps, but straightforward, given a converter or variable supply.)

But with sufficient gain, notice that a small change in one drain voltage, is the ~same change in the opposite gate, which will most likely be a much larger opposite change in the opposite drain, and thus the same gate, and finally the same drain gets a multiplied change! This two-transistor motif is an amplifier, or it can be said to develop negative resistance. Negative resistance dominating over positive, giving an oscillator, and what starts out as a small perturbation (perhaps some ~µV in the simulation, or in a real oscillator when quenched), rapidly grows, and filtered by the resonant tank, becomes a nice sinusoidal waveform.

Of course, the small-signal approximation will not hold forever. A divergent signal, like in an oscillator, will eventually activate nonlinearities in the system, and limit its amplitude -- or other things, like a shift in frequency, the production of harmonics, or unlimited other (chaotic) possibilities, given a suitably complex circuit.

Thus we come to...

## Switching Approximation

The circuit enters the large-signal regime, as the peak amplitude grows beyond Vgs(th) [plus a bit, for the reasons mentioned earlier]. When this happens, one side ceases to draw additional signal current, i.e. it saturates (Vds = Vds(sat) = Id * Rds(on)), flattening the low peak on that side; the other side still has freedom to move, and supply voltage pushes it up, quite far as it happens.

The important thing to appreciate during this transitional phase, is the common-mode voltage is rising, both in terms of DC (Vds, averaged over a cycle, is rising from Vgs(th) to Vin) and AC (in the linear range, both drains swing equal and opposite, zero common mode; nonlinear, one saturates while the other continues to swing higher).

Eventually, amplitude reaches a maximum, limited by the average common-mode voltage equaling Vin. That is, each transistor sees approximately a flat (Vds ~ 0) followed by a whole half-sine, and the average of those equals Vin. Since the average of 0 is 0, and that's half the time, the other half must be an average of 2 Vin, and it's a half-sine, so the peak is a whole π times Vin. Actual value will be less of course, due to losses.

Once full amplitude is reached, it's basically switching, but it's interesting to note that, while gate voltage swings on and off fairly quickly, it still spends a fair amount of time in the transition region; this circuit never really ceases to amplify, actually -- another interesting property.

Note that, at full amplitude, the system undergoes shorting-mode commutation; and indeed this is a necessity, as it's a current-sourcing inverter. That is, the large-value (200uH) chokes act as a current source over the short term (per-cycle time scale), and open-circuiting a current source would draw maximum power (develop huge voltage)! This is inverse of more conventional topologies (half bridge, etc.), which are mostly voltage-sourcing inverters. Indeed this is a symmetry of electronic circuits: you can transform a voltage-sourcing half-bridge into a current-sourcing push-pull, and you must also invert the gate signals, so that "dead time" for the voltage-source case is both off, and both on in the current-source case.

Through both processes, note that much more energy has gone into the circuit, than just the transient (startup impulse) from connecting the supply, say. The amplitude has built up gradually over some cycles -- so it can be much stronger than just the startup transient alone (which, again, mind that LTSpice calculates that in various ways -- look at DC op vs. set-to-zero initial conditions, and consider setting component I.C.'s as well).