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When using hierarchical schematic sheets in Altium with the 'Strict Hierarchical' scope setting you have to include power ports on the symbol sheets. What is the best practice for the port style for these power ports, on both supply and load sheets?

The available I/O types are unspecified, output, input and bidirectional. I can imagine four reasonable ways to do this, see image:

enter image description here

I'm currently doing style 4, using unspecified ports. However this gives a lot of ERC warnings. For example, when an unused input pin on a subsheet is tied to GND the ERC (rightfully) complains that you can't have multiple unspecified ports and input pins on the same net. Rather than disabling the ERC warnings or getting in the habit of ignoring them I'd prefer to follow a better style.

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    \$\begingroup\$ "I'd prefer to follow a better style": I hate to come off as a curmudgeon, but global power ports are the better style, IMHO. Keep the schematic as maintainable, and straight-forward as reasonable. \$\endgroup\$ Commented Nov 3, 2022 at 20:29
  • \$\begingroup\$ @ChrisKnudsen That's a valid point, which I'll consider. I'm used to using explicit power ports because 90% of my (schematic) work is IC design in Virtuoso, where that style is the standard. In comparison I'm finding Altium's handling of hierarchies, ports and net scopes to be disappointing at best, with it complaining about trivial things like having different net names at different hierarchy levels ("net has multiple names"). Still, if someone (also) has an answer within the actual scope of the question then I'd like that :) \$\endgroup\$
    – BrtH
    Commented Nov 3, 2022 at 20:58
  • \$\begingroup\$ @ChrisKnudsen I don't think there is a better style. Each style has its advantages and disadvantages. Global power ports make sense for small designs with one GND and a few power nets. But for larger designs with isolated supplies, multiple power nets, and sheet re-use global power ports can make the design harder and more confusing. \$\endgroup\$
    – SSB
    Commented Nov 4, 2022 at 9:29

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In my experience you will always get some kind ERC in Altium when dealing with hierarchical sheets (speaking from an Altium 19 perspective). So regarding your problem with the port styles for power, I would suggest using number 4. That way you can easily distinguish between power and non-power nets/ports which is probably more important than direction of energy or current.

In order to get rid of the error, simply use non-ERC markers (for that net) that explicitly allow this kind of error. I am using this method and it works fine so far. (Yes, It is annoying for the first marker you create because of the large selection matrix, but once you checked the right boxes everything works as it should)

You also mentioned the ERC “multiple net names” in the comments. I stumbled across the same problem and was astonished after looking it up at the Altium website. The official solution is to turn off this error. Another way would be the same approach with non-ERC markers. But I think more than two different kind of these markers (one for power net and one for unused pins) create more confusion than they help. So I followed the “solution” and turned off the error.

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  • \$\begingroup\$ I would suggest number 4 as well. However, I would also change the pin direction on the part for the pins tied to power/gnd to also be unspecified. It seems inconsistent to use one convention for the ports and another for the part pins. This will remove the error of input pin connected to unspecified. Using the non-ERC marker, as you suggest, could suppress genuine problems that the designer might care about. \$\endgroup\$
    – SSB
    Commented Nov 4, 2022 at 9:16
  • \$\begingroup\$ Thank you for sharing your experience, sounds like there's no perfect solution :( \$\endgroup\$
    – BrtH
    Commented Nov 4, 2022 at 10:02
  • \$\begingroup\$ @SSB "However, I would also change the pin direction on the part for the pins tied to power/gnd to also be unspecified." This doesn't make much sense to me, changing an IC symbol depending on what it is connected to. To be clear, I'm talking about tied op-amp inputs, configuration pins, unused inputs of levelshifters, etc.; all pins which you want as normal inputs in the symbol when used in a different circuit. \$\endgroup\$
    – BrtH
    Commented Nov 4, 2022 at 10:08

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