I'm using a PCF8574 to sink current from an LED. The PCF8574 VDD is 3V3, but the LED is sourcing from 5V.

I think voltage drop on the LED is around 2V, so if I understand correctly, then the IO IC should be sinking only around 3V. I believe datasheet specifies +.5V is allowed over VCC on inputs, so after the drop this is well within tolerance by my understanding. Is that the correct way to look at this, or should I really be protecting the IO IC with an NPN in case the LED fail closed/shorted? I'm trying to avoid adding transistors if I don't need them.

It's a bit easier to source from 5V as this is directly from a buck converter, but the 3V3 comes from a regulator. I could source the LED from 3V3 but I'd prefer to source from 5V for efficiency.

Sink LED from 5V


Edit: 500mA on the 3V3 is what the regulator is able to deliver, in case you're wondering.

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    \$\begingroup\$ Is it ever possible, even under transient conditions, for the +5V to be present when the 3.3V rail is 0V? Much less likely if the 3.3V is derived from the +5 via a linear regulator, but not all systems are so simple. \$\endgroup\$ Commented Nov 4, 2022 at 13:29
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    \$\begingroup\$ That was my concern, along with the LED's parasitic capacitance making a very brief 5V pulse possible. But JM's answer shows that this "is supported" later in the datasheet. So apparently those pins are latchup-immune. I wonder if that is "immune" like how no-clean flux is really no-clean? \$\endgroup\$
    – rdtsc
    Commented Nov 4, 2022 at 13:32

1 Answer 1


That scenario is supported and even recommended in the TI datasheet (page 16, figure 20).

Device supplied by lower voltage

  • \$\begingroup\$ Aha! Thanks, page 16. I missed that. I only paid attention to figure 19 where both are VCC. \$\endgroup\$ Commented Nov 4, 2022 at 13:22
  • \$\begingroup\$ As an aside, I tried to understand why the 100k R is needed in fig 19, but couldn't quite wrap my head around the datasheet explanation... any chance you know about this too? \$\endgroup\$ Commented Nov 4, 2022 at 13:55
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    \$\begingroup\$ @NickBolton Yes, it is exactly same reason why CMOS inputs should not be held right at the input threshold. If you connect LED to same 3.3V supply voltage, it will develop some voltage over it, pulling the IO pin voltage lower. As an input voltage floats at about mid-supply, both the input PMOS and NMOS transistors are half-on and current flows from VCC to GND. \$\endgroup\$
    – Justme
    Commented Nov 4, 2022 at 14:22
  • \$\begingroup\$ I wonder if figure 20 also applies to sinking current from other parts, such as a 5V buzzer. \$\endgroup\$ Commented Nov 4, 2022 at 15:30
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    \$\begingroup\$ Unlikely. The section only talks about driving LEDs. A 5V buzzer would likely just leak current into 3.3V IO pin. \$\endgroup\$
    – Justme
    Commented Nov 4, 2022 at 15:37

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