While choosing a MOSFET gate driver for a full bridge, what does one being "Tolerant to negative transient voltage, dV/dt immune" mean practically?

Question

As part of designing an H-bridge module rated for 30V 50A operation, operating from a low ESR power source driving an unkown DC motor, I need to select a gate driver. The intention is for the circuit to self protect itself and for it to be able to take some abuse, while being cost effective.

I first chose a power mosfet that has a desirable Rds(on) as my application requires minimal heat loss, then used Ti's FET losses calculator in the powerstage designer. The result is that to dissipate a maximum of 4W per MOSFET during max load steady state operation, I need a specific total gate resistance (7.9 Ω) such that gate current is 0.8 A. Perfectly doable.

While looking for a suitable gate driver, two have caught my attention. Option 1 is IR2010(S)PBF while option 2 is MIC4606-2. The IR (now infinion) part advertises "Tolerant to negative transient voltage, dV/dt immune" in its datasheet while the micrel (now microchip) part does not explicitly mention anything about dV/dt immunity. On the other hand, the micrel part advertises "Adaptive Dead Time" while the IR part does not have deadtime as it is not a half bridge driver. Looking briefly at in stock parts, I was not able to find parts from other manufacturers that claimed dV/dt immunity. I know that dV/dt of some sort kills MOSFETs if the circuit is not designed properly.

On page 21, the micrel datasheet includes the following paragraph, does this mean that adaptive deadtime and dV/dt immunity are tradeoffs?

Adaptive dead time monitors voltages on the gate drive outputs and switch node to determine when to switch the MOSFETs on and off. This active approach adjusts the delays to account for some of the variations, but it too has its disadvantages. High currents and fast switching voltages in the gate drive and return paths can cause parasitic ringing to turn the MOSFETs back on, even while the gate driver output is low

Consequently, I discovered that I dont really understand dV/dt in a half/full bridge configuration. In what case would dV/dt kill an H-Bridge's MOSFET? Is this feature in the IR part relevant to an H-bridge? Is it built into the micrel part but not advertised, or may just require a couple of components or good PCB layout?

Answer 1

I can see where the data sheet is confusing. There are two separate issues you are concerned with.

The first is dead time. You can see from the data sheet of the MOSFET you have chosen that the delay to turn "on" is shorter than that to turn "off." This is common to MOSFETs, so in a theoretical world where you switched the gate voltage simultaneously on both the high side and low side, one MOSFET would turn "on" before the other turned "off." With both MOSFETs on, the power line is instantaneously shorted to ground, resulting in a current spike and power being dissipated in the MOSFETs, potentially blowing them but at least generating a lot of unwanted noise.

So the solution is to allow some "dead time" between switching one MOSFET off before you switch the other one on. Unfortunately, this means that both MOSFETs are "off" for a short time. When switching an inductive load like a motor, turning off both switches means that the inductive current must find another path. The data sheet figure below shows this path with a dashed red line, through the body diode of the low side MOSFET. But this path is not available instantly, because of the body diode turn-on time, parasitic inductances, etc. So, the voltage goes (possibly several volts) negative until the current path is established, then is reduced to the body diode voltage drop below ground. Once the dead time is over and the MOSFET has switched, current can flow through the drain to ground. You can see that the author recommends a Schottky clamp to provide an alternate current path to the body diode path, presumably with the schottky diode close to the driver chip.

Looking at another figure from the data sheet, you can see the effect of dv/dt. When the low-side MOSFET switches "on," the dv/dt on the drain is high (in your case the manufacturer claims to switch about 20 volts at 100 ns). In the figure below, this results in a current injected back into the gate through CGD. Since current in a capacitor is C*dv/dt, high dv/dt means high instantaneous current being injected into the gate. This current opposes the current from your driver, so it tends to turn the MOSFET back "off," driving its gate negative and putting the MOSFET into its active region. This can repeat several times per switch, resulting in a ringing or oscillation. When a MOSFET is fully "on" it dissipates little power (high current but negligible voltage). Similarly, when it is fully off it has high voltage but no current, so no power. When it is switching, the power is dissipated, because both voltage and current are present. So a clean switch is needed to keep the MOSFET from overheating and possibly failing, especially in PWM situations where the switching frequency is high.

Using good board layout techniques and adding the protection circuit is your best defense. Keep traces short and wide, and don't neglect the gate drive traces and power supply traces for the driver.

Good luck!