I am a self taught RF hobbyist. Recently something clicked and BJT biasing no longer seems like black magic to me. I would like some verification on my intuition of BJT biasing for small signal NPNs (class A amplifers at HF/VHF). Please feel free to correct me!

Is the following a valid approach to bias a CE amplifier with a voltage divider? For refrence Known quantities:

  • Input signal pk/pk amplitude and frequency
  • VCC supply voltage
  • Target Gain


  1. Select an appropriate BJT. Ft should be ~100 mhz above working frequency.

  2. In the datasheet of the BJT, note the collector current with the largest Hfe. This is Ic

  3. Let Emitter voltage Ve= 0.1*VCC, Ic = Ie

  4. Now, Re= (Emitter voltage)/(Emitter current). Therefore Re = (0.1*VCC )/(Ie)

  5. Note that Vcc = Vce + Ve + Vc. To simplify, VCC = (gain * pk-pk input) + (0.1*VCC) + Vc

  6. Collector resistor = (collector voltage)/(collector current). Therefore Rc= Vc/Ic

  7. VR2 = 0.7+ (emitter resistor voltage), and IR2 = 10* Ib. Ib=Ic/Beta. Now we can calculate R2=(0.7+emitter resistor voltage)/(10 * Ib).

  8. VR1 = VCC - VR2, IR1 = IR2 = 10*Ib. Therefore, R1= (VCC-VR2)/(10 * Ib).

Some things to note:

  1. If you choose to use an emitter bypass capacitor, its reactance at lowest frequency of interest should be roughly equal to your emitter resistor. For AC, the reactance of this capacitor can be thought of as your new Re. Gain is now Rc/Xc. Without a bypass cap, Gain = Rc/Re
  2. Zin = R1||R2||B*(RE + 25mV/Ib).
  3. Zout = Rc || Load.
  4. If an inductor is used instead of Rc to present a load to AC only, the output capacitance of a BJT is in parallel with this inductor and a tuned circuit is formed. The input capacitance of a second amplifier stage would also be in parallel with this capacitance.
  5. Miller capacitance: A capacitor whose value increases with gain at high frequencies occurs between base and collector, gain diminishes as this capacitor gets larger because more output is being fed out of phase back to input. This capacitance is seen as input capacitance and is in parallel to the output capacitance of an amplifier stage before it.

Please correct me where I am wrong, a little bit of explanation goes a long way!

  • \$\begingroup\$ Is this just to explore/expand your abilities? There's no load specified and no source impedance. And without those, yet a desired voltage gain, all you can do is assume zero source impedance (ideal) and infinite load impedance (also ideal.) Is that what you want? Also, you talk about bypass caps but I suspect you have no idea about distortion or the use of NFB to correct things when high voltage gain is desired from a stage (which makes lots of distortion without NFB almost a certainty.) It's possible you want to include all that stuff in a design, though. Looks like maybe so. Not sure. \$\endgroup\$
    – jonk
    Nov 20, 2022 at 4:21
  • \$\begingroup\$ (Also, no one actually uses that CE stage for much except education. Too many better ways to go for any desired task.) \$\endgroup\$
    – jonk
    Nov 20, 2022 at 4:24
  • \$\begingroup\$ Sorry for not specifying, yes source and load are ideal; I just wanted to confirm that the biasing steps are reasonable and my understanding of the topic is not misguided \$\endgroup\$ Nov 20, 2022 at 4:25
  • \$\begingroup\$ If this is purely about a basic understanding then the gain isn't important, though it would be fine to set a reasonable target (like 5X.) That means no emitter resistor bypassing. Just simple resistors (except for the input and output caps.) Vcc might be 10 V. Is that acceptable? \$\endgroup\$
    – jonk
    Nov 20, 2022 at 4:30
  • \$\begingroup\$ @jonk absolutely. Just wanted to see if I am on the right learning track. \$\endgroup\$ Nov 20, 2022 at 4:31

1 Answer 1



I'll start with the schematic:


simulate this circuit – Schematic created using CircuitLab

We know that a BJT can operate over a fairly wide range of collector currents while it's \$\beta\$ remains fairly flat (stable.) But temperature definitely impacts \$\beta\$ and so does part-to-part variation as well as drifting over time, too. You'd really like to have a design that is fairly immune to variations of \$\beta\$ in a specific BJT. \$V_{_\text{BE}}\$ is also highly temperature-dependent. So temperature is something to worry over. I'm mostly going to gloss over the details. But keep in mind that I'm still thinking about it when designing this even for simple educational needs.

(There's a process to figure all this out called sensitivity analysis so that you can quantify just how immune a circuit is due to some quantified impact of any concern you have. But we'll avoid all that for now.)


We can get a voltage gain, \$A=5\$, around most any reasonable quiescent current. But together with \$V_{_\text{CC}}\$, this choice directly impacts the output impedance. Low \$I_{_\text{Q}}\$ means higher output impedance. And usually, we seek lower output impedance.

Also, BJTs are designed to work over maybe 3 or perhaps 4 orders of magnitude current (their \$\beta\$ is relatively flat over a range like this, but outside of it may change much more drastically -- plus there are other odd behaviors that intrude and you may wish to avoid.) You can usually tell what collector currents a BJT 'likes' by skimming its datasheet. But for most small signal BJTs it's better to stay in this range: \$10\:\mu\text{A}\le I_{_\text{Q}}\le 10\:\text{mA}\$.

MIT has a datasheet for the 2N2222A. Find this:

enter image description here

The fact they bother to provide both a min and max there tells me this is a good number. So values near that will be good. They don't say much for anything below about \$100\:\mu\text{A}\$, so it may be good to avoid such low values. And the higher values are like more for switching, not analog amplification. This package just could not take the heat of those much larger collector currents, otherwise.

So I'm setting \$I_{_\text{Q}}=2\:\text{mA}\$.

Headroom Voltages

We will want to set the quiescent \$V_{_\text{E}}\$ to something more than \$500\:\text{mV}\$ to mitigate temperature variations on the operating point. More is better, less is worse. I won't go through the quantitative calcs here. But suffice it that you want some distance here.

And anything you reserve there has to be \$A=5\$ times larger for the voltage drop across the collector resistor.

More, you have to also account for the maximum allowable peak (not peak-to-peak, but peak) output voltage swing, \$V_{_\text{PKout}}\$. And you also need to reserve out something for the absolute minimum allowable \$V_{_\text{CEmin}}\$ to keep the BJT out of saturation (which means distortion or clipping.) That must be at least \$1\:\text{V}\$ but here again more is better.

Working through the details you should start with something like this:

$$V_{_\text{CC}}-I_{_\text{Q}}\cdot R_{_\text{C}}-I_{_\text{Q}}\cdot R_{_\text{E}}-V_{_\text{CEmin}}-V_{_\text{PKout}}-\frac1{A}V_{_\text{PKout}}=0\:\text{V}$$

Now, in writing that I assumed the current the collector resistor and the emitter resistor are identical. They aren't. But \$\beta\$ is usually high enough that we don't care about the difference. It's a waste of time worrying over it.

Also, I subtracted out \$V_{_\text{PKout}}\$ once (that's for when the output signal drives the collector voltage downwards towards the emitter on the down-going part of the cycle) and then \$\frac1{A}V_{_\text{PKout}}\$ again because of the fact that when the collector is moving down the emitter is moving up. And the amount it moves up will be \$\frac1{A}\$ of how far the collector voltage moves down. (They are pinching towards each other.)

Solving the above for \$V_{_\text{PKout}}\$ (recognizing that \$V_{_\text{E}}=I_{_\text{Q}}\cdot R_{_\text{E}}\$ and that \$A\cdot V_{_\text{E}}=I_{_\text{Q}}\cdot R_{_\text{C}}\$):

$$V_{_\text{PKout}}=\frac{A}{A+1}\left(V_{_\text{CC}}-V_{_\text{CEmin}}\right)-A\cdot V_{_\text{E}}$$

For a voltage gain of \$A=5\$ and \$I_{_\text{Q}}=2\:\text{mA}\$, and if we squeeze things really tight so that \$V_{_\text{CEmin}}=1\:\text{V}\$ and allow for \$V_{_\text{E}}=1\:\text{V}\$, then \$V_{_\text{PKout}}=2.5\:\text{V}\$. So that's \$5\:\text{V}\$ peak-to-peak and the input then should not exceed \$V_{_\text{PKin}}=500\:\text{mV}\$.


This is pretty easy now. The first pair is just \$R_{_\text{E}}=\frac{1\:\text{V}}{2\:\text{mA}}=500\:\Omega\$ and \$R_{_\text{C}}=A\cdot R_{_\text{E}}=2.5\:\text{k}\Omega\$.

(At \$2\:\text{mA}\$ the dynamic emitter resistance, which is a slope and not a real resistor of any kind, would be \$13\:\Omega\$ at room temp. Comparing this to \$R_{_\text{E}}=500\:\Omega\$ means it's not a big concern for our hoped-for voltage gain but it may slightly affect the precise value. That's not usually an issue.)

Now all we need to do is bias the darned thing.

The biasing pair of resistors need to have about 10% of the quiescent current in them. Since we usually can expect the base current of the BJT to be less than 1% of the quiescent current, this means that the base current won't seriously impact the biasing point.

So let's calculate them. Note that \$R_1\$ carries our quiescent 10% biasing current plus the base current. So 11% of \$I_{_\text{Q}}\$. But \$R_2\$ only needs to carry 10% of \$I_{_\text{Q}}\$, since the base has by then subtracted its bit.

We also know that the base voltage will be about \$700\:\text{mV}\$ above \$V_{_\text{E}}=1\:\text{V}\$, so \$V_{_\text{B}}=1.7\:\text{V}\$.

Thus: \$R_1=\frac{V_{_\text{CC}}-V_{_\text{B}}}{0.11\,\cdot\, I_{_\text{Q}}}\approx 37.73\:\text{k}\Omega\$ and \$R_2=\frac{V_{_\text{B}}}{0.10\,\cdot\, I_{_\text{Q}}}= 8.5\:\text{k}\Omega\$.

Obviously, you need to select values you can get for all this and most of these aren't directly available. So let's to a quick hack.

Let's set \$R_{_\text{E}}=560\:\Omega\$ and \$R_{_\text{C}}=2.7\:\text{k}\Omega\$. We bump them both up which will slightly reduce \$I_{_\text{Q}}=\frac{1\:\text{V}}{560\:\Omega}=1.786\:\text{mA}\$ and will slightly lower our \$A=\frac{2.7\:\text{k}\Omega}{560\:\Omega}=4.8\$ gain.

Then \$R_1\approx 42\:\text{k}\Omega\$ and \$R_2\approx 9.5\:\text{k}\Omega\$. That looks like a candidate for increasing, as well, so that \$R_1= 39\:\text{k}\Omega\$ and \$R_2= 9.1\:\text{k}\Omega\$, which are available. This will slightly muss with our quiescent point again. But not a lot. So let's see:

enter image description here

I've included the operating point in text on the schematic. You can see that the quiecent current is very close to the \$2\:\text{mA}\$ we designed for. And the gain does appear to be about \$4.8\$. And no clipping or any visible distortion there.

Must be an accident. :)

One can also perform runs at higher and lower temperatures to see just how much things change. I did that. But it wasn't much -- a few tens of microamp changes in the quiescent current. So I didn't bother posting all that up.

  • \$\begingroup\$ Could your share your thoughts on notes #4 and 5 that I made? I have a feeling those capacitances are in parallel but I can not find any resources to confirm that \$\endgroup\$ Nov 20, 2022 at 7:13
  • \$\begingroup\$ Informative analysis! Looks like we share a lot of the same points but just got there from different places. Using my method: Let VCC= 10V, input is 2.5khz @ 1V pk to pk. I got R3=2K R4= 500 R2=8.5K and R1=41.5K. LTspice shows equivalent performance: Quiescent current 1.93mA and gain of 5! Looks like I got the hang of it. Thanks! \$\endgroup\$ Nov 20, 2022 at 7:25
  • \$\begingroup\$ @YousifAlniemi #4 and #5 present more than I'd like to write. Especially tonight before heading off. Just a thought about it now, those are probably better put in a separate question. Is that something you might consider? \$\endgroup\$
    – jonk
    Nov 20, 2022 at 7:40
  • \$\begingroup\$ Will do. Thank you. \$\endgroup\$ Nov 20, 2022 at 7:47

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