3
\$\begingroup\$

I have a circuit with four 0-10 V, 5 mA output channels on a PCB designed to work for ventilation, where the output valves are powered by 24 VAC. It is to resolve a problem we have at work with 350 ventilation units that have issues.

I would like to protect the op-amp outputs from 24 VAC being connected to them in error (quite likely to happen). Each channel needs to output up to 5 mA normally without an error greater than 5% as a start (strictly speaking, as it is a PID controller, I guess the controller would deal with errors even if they were larger than that as long as they were not too non-linear).

In addition I have the usual constraints of trying to minimise number of parts (especially number of specialised parts), board space, and cost. The board is standard double-sdied FR4.

The circuit has a bi-directional TVS for surge with a clamp of +/-70 V but that has no effect on 24 VAC.

I have looked everywhere, and on this site have found some excellent ideas that cover part of the problem, but nothing that completely does it. I wondered if anyone out there had met a circuit in the past that they found ideal for this consideration.

The final stage of the 0-10 V circuit is a TLV274 powered by 15 V and GND. Short circuit limit on this is 100 mA. The datasheet is unclear on what negative or overvoltage the output can take. The inputs can take 0.2 V beyond the rails (i.e. -0.2 V past GND and +0.2 V past supply).

So the problem is in two areas:

  1. High positive voltage coming back;
  2. High negative voltage coming back.

Each case needs to be covered, with the op-amp both powered on and off.

Here are some ideas I have that have some chance of success:

  1. An ideal diode based on a FET, or a low voltage drop diode, and live with the drop that it gives.

  2. For this, though of a standard two-transistor current limit circuit like this one, seen elsewhere on here. Standard 2 transistor current limit circuit

However, all this is a lot of bits for 4 channels, so please may I ask, am I over-complicating this?

I have tried loads of variants using resistors with Zeners, but remember the incorrect 24 VAC connection could be constant, and so the resistors end up being several watts. I have looked at three-terminal regulators as current limiters, and nothing quite works. I thought of the two-transistor circuit alone (so no diode), but it cannot stand a reverse bias greater than the transistor breakdown or about 5 V.

I appreciate you are busy people and good at what you do, and probably can eat this kind of problem, so just some quick hints would be great. Anything you have seen that may give me another route to follow.

\$\endgroup\$
0

3 Answers 3

4
\$\begingroup\$
  1. A diode is not sufficient to protect your OpAmp since the AC waveform will go negative, too, which will make the diode conduct excess current and thereby destroy your OpAmp.

  2. The current limiting circuit you've shown is not suitable for your application since it introduces about 10% error into your signal and is also non-linear. Furthermore, as you've already noted, it doesn't work for AC signals (you'd need an additional diode to prevent reverse current). However, a diode will likely interfere with your PID controller since it may also need to sink current, not just source it.

You can use two anti-serial depletion-mode MOSFETs to limit an AC current:

schematic

simulate this circuit – Schematic created using CircuitLab

With the component values shown, the current limit should be around 10mA. Do not substitute another FET. I've chosen the BSS169 because its Id/Vgs curves make it particularly suitable for building a ~10mA current limiter and its Vgs tolerance is small enough to allow the current limit to be reasonably accurate.

You might have to tweak the source resistor (R1) a bit to get exactly the current limit you want. (But make sure not to exceed the FET's power dissipation limit if you raise the current limit. You shouldn't go beyond 20mA.)

The diodes will take up any excess current that the OpAmp can't handle (even when the circuit is powered off). You might want to add a TVS diode to the VCC rail to prevent any fault current from raising the voltage on VCC too much.

This circuit has been previously shown here, too: https://electronics.stackexchange.com/a/473344

Alternatively, you could also use a PTC polyfuse, as already mentioned by PStechPaul. Bel Fuse 0ZCM0002FF2G would likely be suitable (20mA hold current). You will need clamping diodes with a higher current rating, though, since the polyfuse will initially pass a very large current before it actually trips. You also have to be careful with your choice of clamping diode as excessive junction capacitance will cause your OpAmp to oscillate. The NSR0530H has 10pF junction capacitance (typical), which should be fine. You can't just use any random cheap diode, though.

schematic

simulate this circuit

\$\endgroup\$
2
  • \$\begingroup\$ Thanks for pointing out the need to consider capacitance and current rating of both the SCR and the anti-parallel diode. \$\endgroup\$
    – PStechPaul
    Nov 21, 2022 at 23:40
  • \$\begingroup\$ Thank you for such an amazing answer, along with the great one from PStechPaul I was delighted to have 3 new routes to try that I would never have thought of. I like the dual MOSFETS as a true two way current limit, and the polyfuse circuit has a low component count. I liked also you gave the component numbers. Thanks again. \$\endgroup\$
    – REPuzzle
    Nov 22, 2022 at 9:16
4
\$\begingroup\$

The below circuit works similar to the one posted by @JonathanS..

It uses a JFET (which is a depletion FET), instead of the depletion MOSFETs. The advantage of the JFET is, that it is symmetric so it does auto-swapping of drain and source for bipolar current limiting, if properly biased. This auto-biasing is achieved via the diodes. As a result, only one FET is needed.

schematic

simulate this circuit – Schematic created using CircuitLab

It limits current to the \$I_{DSS}\$ saturation current of the JFET in both directions, but maintains a low resistance (noise) when there is no limiting case. So another advantage is, that the channel resistance is often lower than the additional resistor for the MOSFET variant.

enter image description here

I tested how fast this architecture limits with a scope a while back, and it came out to limit in faster than 10 ns (limited by quick-and-dirty scope probing).

enter image description here

\$\endgroup\$
2
  • \$\begingroup\$ Thank you tobalt for the circuit which adds another innovative angle to the problem. I guess JFETs are unique in that they are symmetrical like this. I think the device specification would be crucial for this method, and testing as well. In the data sheet I looked at for the J111 IDSS was specified for a given VDS, so it may vary with it. The MOSFET does probably use a higher resistance as you have noted, but the limit current can be adjusted with it, which helps if that is likely on testing. \$\endgroup\$
    – REPuzzle
    Nov 22, 2022 at 13:46
  • \$\begingroup\$ @REPuzzle Yes, the MOSFET variant with the additional resistor can be easier tuned to limit at a certain current level. The JFET variant with only a single channel in the signal path and no additional resistors is particularly useful for low-noise applications. \$\endgroup\$
    – tobalt
    Nov 22, 2022 at 13:58
1
\$\begingroup\$

Much depends on just how the driving circuit is configured, and internal details of the chip. But the TLV271 datasheet does not show a representative schematic. If the 24 VAC source is overload protected or current limited, a simple crowbar using an SCR and 12V zener to gate would just essentially short the errant AC, but may need to be reset after it's removed if the normal 5 mA is above holding current. Otherwise a self-resetting Polyfuse could be added.

Here is a simulation of what I had recommended as a possible solution above. This shows the original output of the PLC being restored to 5 mA and 10 V after the 24 VAC source has been removed, but it is possible that the 5 mA may result in the SCR latching ON. I have added a 1 ohm resistance to the 24 VAC supply which will limit the output to 24 amps.

SCR Crowbar for 24 VAC

(edit) The MCR8xx SCR is rated 800V and 8A, and holding current can be as low as 0.5 mA. A more suitable SCR rated 100V 25A is MCR69, recommended for crowbar circuits, and has a typical holding current of 15mA.

(edit2) As @JonathanS pointed out, you need to consider the effects of capacitance, leakage current, and peak current for the SCR and anti-parallel diode. The recommended MCR69 has a leakage current of about 10 uA at 25C, but could be 2 mA at 125C. No spec for capacitance is given, but one article states "a few pF", and this article about crowbar circuits warns that a high dV/dt can couple through the capacitance to the gate and cause unwanted triggering.

\$\endgroup\$
1
  • 1
    \$\begingroup\$ Thank you so much for your work on this, and for including a simulation., as well as a lot of useful detail. Credit also for mentioning the risk of latch-up. I'll keep this idea as a backup, and would never have thought of it myself. Thanks again. \$\endgroup\$
    – REPuzzle
    Nov 22, 2022 at 9:12

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge that you have read and understand our privacy policy and code of conduct.

Not the answer you're looking for? Browse other questions tagged or ask your own question.