simulate this circuit – Schematic created using CircuitLab

I have the above in a vintage computer project's schematic, without specification of the transistor or the diode. The Intel 4289 serves as adapter for the Intel MCS-4 system (4004 CPU, 4002-x RAMs and so on) to standard memory, in this case an 2708 EPROM.

The designer has added a transistor circuit and labeled it with "BIAS", which I don't understand. It seems the base-emitter voltage always turns the transistor on, so that at the emitter a constant voltage (VBias) is generated. If the data bus line goes below VBias-0.7 V a current flows from C1 and the emitter. But what purpose could that have? Also the current seems very high, around hundreds of milli amps.

Does anybody know something about this design? Is it some kind of bus ringing supression or some kind of active termination or something else completely?

  • 1
    \$\begingroup\$ The transistor circuit is an emitter follower and should give around 2V on the emitter. This would be a TTL logic high. I would expect the 4K7 resistor would be in series with the diode otherwise, as drawn, it would be difficult to create a TTL logic 0. The 4004 was pmos if I recall, so you may have needed pullups and 2V was probably chosen for speed and power consumption. \$\endgroup\$
    – Kartman
    Nov 21, 2022 at 22:02
  • \$\begingroup\$ Right, the 4004 is pmos, however, on the native PMOS level side, he did not use any such trick. The resistor is parallel. That was also my concl. that the lines had to sink a lot of current. in order to provide TTL low. If the memory was a 1702A, the specs says, load current should be around 3 mA in order to create VLo around 0V, otherwise, unloaded, data line could be around -6V as well. However, since the 4289 was constructed to be interfaced to std memory (what the 1702A was), I find that strange as well... Intel user manuals only mention pull ups to improve speed and driving capability. \$\endgroup\$
    – andi8086
    Nov 21, 2022 at 22:34
  • \$\begingroup\$ My guess is the schematic is wrong. \$\endgroup\$
    – Kartman
    Nov 21, 2022 at 22:45

1 Answer 1


According to the web page of Bill Kotaska, whose schematic for a Busicom 141-PF replica has a similar 'bias circuit':-

All TTL inputs which are driven by NMOS outputs are protected by diode clamps.

This suggests the 'bias circuit' should supply ~0.7 V to the diode arrays so they will clamp signals that attempt to go below ground. R1 and R2 produce a bias voltage to the transistor of ~2.1 V. Subtracting voltage drops across the B-E junction and clamp diode we get ~2.1 - 0.7 - 0.7 = 0.7 V, which seems a little high. However if the transistor is a Darlington type then the diodes should clamp at ~0 V.

Unfortunately no BOM was supplied for this project, and the photo of the board is not clear enough to identify any transistors on it. However on one corner of the board next to the power supply connector we see a T0220 device and two resistors 3.3k and 2.2k which could be the bias voltage resistors.

enter image description here

There appears to be 6 characters along the bottom of the device - could they say TIP112?

  • \$\begingroup\$ Now that makes sense... I forgot to subtract the second 0.7V and also you are an eagle to see TIP112 which seems right. \$\endgroup\$
    – andi8086
    Nov 22, 2022 at 9:34
  • \$\begingroup\$ And thank you very much of course :D \$\endgroup\$
    – andi8086
    Nov 22, 2022 at 9:39

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.