There have been some questions asked recently about op-amps, and I was curious to see how to make one with just NPN and PNP transistors. I did a simulation in LTspice and it seems to work pretty well, and I think it would be useful to illustrate the inner workings of op-amps. There also may be some applications where such a discrete design may have advantages, such as high supply voltages. But there are probably some real disadvantages as well, particularly due to inexact matching of junction voltages and temperature stability.

Here is the simulation:

Discrete OpAmp

Note that this shows a non-inverting circuit with gain of 3, over an input range of 0-5 volts, and power supplies of 3, 5, and 12 volts. The circuit becomes operational at a little more than 600 mV, which is a typical forward voltage for silicon devices.

It is interesting to see that for the 3V power supply, input voltage above 3V causes the output to drop to near zero (which I think is called phase inversion), whereas for higher supply voltage the output saturates at near the supply voltage. This is distortion due to exceeding the common-mode voltage limit.

I will try to add a Circuit Lab schematic so anyone can experiment with the design using simulation.


simulate this circuit – Schematic created using CircuitLab

I copied this basic circuit from this source, which explains how it works. But essentially it is comprised of two current mirrors. The one on the top creates balanced currents that are summed by the one on the bottom, which also sets the bias level with the resistor R1. The two BJTs in the middle comprise the circuit which upsets the current balance according to the difference in the IN+ and IN- inputs, and provides an output voltage that is used for negative feedback.

The output impedance of the circuit is determined by the bias resistor R1. So with a 10k resistor it can drive a similar load, and that works for 1k as well.

  • 4
    \$\begingroup\$ It's only the input stage of a practical op amp. Have you measured the output impedance? It's expected to see as low as possible for a practical op amp, yet you get the output from collector so it might be a bit higher. \$\endgroup\$ Nov 22, 2022 at 9:02
  • \$\begingroup\$ PStechPaul, try to describe what you have there. What are the two collectors formed by Q4 and Q5, joined at the name node, performing exactly? Can you describe it in words? \$\endgroup\$
    – jonk
    Nov 22, 2022 at 9:15
  • \$\begingroup\$ I used this same circuit to make a 3.3V 600mA LDO regulator by adding an NPN and PNP transistor, so the load on the output is very small. I'll add an explanation to my question. \$\endgroup\$
    – PStechPaul
    Nov 22, 2022 at 9:22
  • \$\begingroup\$ The LDO regulator is in my answer to this question: electronics.stackexchange.com/questions/643056/… \$\endgroup\$
    – PStechPaul
    Nov 22, 2022 at 9:37
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    \$\begingroup\$ The "almost" is what's important in your last comment. I'm an IC designer designing car radios and existing commercial op-amps can't do the specs I'm working with. I still think it's useful for you to, at least, provide some basic requirements, such as output swing and load. For instance, if you need a large swing, say 6V, it'd be nice if you add a PNP long-tail pair for a 2nd stage such that you demand too much out of your 1st stage, lower the output DC voltage and, at the same time, have a more designable amplifier for frequency comp. \$\endgroup\$
    – Designalog
    Nov 22, 2022 at 10:44

2 Answers 2


This is basically only the input part of what usually one considers to be an operational-amplifier, also called operational transconductance amplifier (OTA).

One obvious downside is, that the output swing is extremely limited, as it cannot swing below the inverting input. So maybe one useful next step, is to add another level-shifting stage to the output (another PNP common emitter stage), which will give you the entire supply range as output swing. However, adding another stage brings you into the territory where you may need frequency compensation, e.g. a Miller capacitor.

Another thing is the matching of the mirrors. This can be improved by adding emitter resistors.

The input bias current is rather large. It can be improved by using Darlington/Sziklai pairs or just go to FETs right away.

Eventually, you may want to consider cascoding the input transistors for greater bandwidth and better common-mode rejection and better input impedance.

As mentioned by @RohatKılıç, a practical opamp is often able to drive a considerable amount of current, several 10 mAs. For this you will need an output stage, usually a Class AB push-pull stage. As with all Class AB designs, it can be quite a PITA to stabilize the quiescent current, so one can consider using an opamp IC for the output stage.

As you mention the application as LDO: For that particular application I went away from using this kind of "full opamp" topology and I am a fan of the flipped voltage follower topology instead.

  • 2
    \$\begingroup\$ OTAs have some advantages over standard opamps. Capacitive loading destabilizes standard opamps, but stabilizes OTAs. Standard opamps have a rising noise spectrum above the closed loop bandwidth, but capacitor-stabilized OTAs have a falling noise spectrum. \$\endgroup\$
    – John Doty
    Nov 22, 2022 at 20:14

Basic inverting amplifiers which include the required basic building blocks. It would be a simple task to convert them from inverting to non-inverting. Closed loop gain = -10.

The top amplifier makes use of an npn input pair, pnp current mirror and pnp VAS where as the lower amplifier makes use of pnp input pair, npn current mirror and npn VAS.


  • 1
    \$\begingroup\$ How, exactly, are the current sources constructed, using discrete components? I would assume they would use another current mirror biased with a resistor to the supply rail. And do they need to remain constant over power supply variations? That would require some sort of voltage reference. \$\endgroup\$
    – PStechPaul
    Nov 22, 2022 at 23:06

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