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I am new to designing PCB on eagle, schematic is simple. But making a PCB board is where it gets interesting.

Here's my question to you guys:

I have realized that daisy chaining power supply from one IC to another cannot be good. And in a simple double sided PCB board layout (free eagle version), multiple power planes are out of the question and increases unnecessary complications.

So, I have decided to run a couple of power line (thick lines) along the entire length of my board.

  1. Is that a good idea?
  2. Has anyone done that before, and if so, any general guidelines to handle power buses in PCB?
  3. Any rules pertaining to handling the capacitors on the supply lines to the ICs (op-amps ) lines?
  4. Am I an idiot? and is there a better way
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I recently made a small PC board design that can help to show how you can do a 2 layer board but still achieve a good GND plane. In the picture below the left shows the top side of the circuit board while the right shows the bottom side of the board. Notice how the bottom side has been filled in to provide a GND plane.

enter image description here

Any connections to the GND plane simply drop down as a via or component through hole. Component leads that connect to the GND use a special thermal spoke type pad connection so that it is easier to solder these pins without the plane sinking all the heat away from the solder point. When doing your layout for the GND plane side it is important to minimize how much area gets cut up by routing on this side. Sometimes you can improve the cut up areas by adding connections on the top side that bridge the GND in places where it was cut too much. You can see a bridging strap of this type just to the left of the P4 reference designator on the top side. On the GND side you'll see two GND connected vias.

The top side of this design has examples of bussed power and filled plane power distribution. The filled part is a 3.3V plane comes from P1-1 and feeds to pin 1 on U1, U2 and U3 and some capacitors. There is bussed 5V power that comes from P3-1 and goes to C1, C2, VR1 and down to U4 through a larger sized trace on the back side. The output of the VR1 regulator is 2.5V that is bussed to C3 and C4 and then to pin 16 on U1, U2 and U3 and some additional capacitors.

Notice how capacitors are placed close to VR1 and the U1, U2 and U3 ICs. Also the C9 bypass capacitor is placed right across the 5V/GND connections of the 434 MHz radio receiver at U4.

I used the free schematic/PCB CAD package called Design Spark for this design.

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For double layer circuit boards, providing your schematic does not contain RF circuitry at frequencies much above 100MHz, a general guideline that I adopt is to try and make one side of the circuit a ground-plane and route as much as you can on the component layer. When it comes to DC power tracks feed power to the parts of the circuit that take the most current first then tee-off to the less-hungry circuits.

For instance if it were a power amp for an audio application feed power to the main output stage first - this means that when you tee-off to circuits that handle smaller signals there is no current in those tracks that are used by the power transistors.

Daisy chaining the power is therefore something that you can't avoid in these situations. If you have sensitive analogue circuits and digital circuits try and avoid ground-planes becoming contaminated by splitting the ground plane at the point where digital meets analogue such as at an analogue to digital converter.

Without more detailed knowledge of the circuit it is impossible to be more specific; if the circuit topography suits sending power lines down a specific area of the board then do so but be aware of sending large currents further than they need to be sent i.e. minimize the track lengths carrying these currents.

Mount IC caps as close to the power pins as possible is a general rule and tie them directly into the ground-plane.

A better way is to use more layers but many, many circuits don't need that level of sophistication.

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  • \$\begingroup\$ Didn't think about powering up the power-hungry ICs first. Makes complete sense. Thanks for the tip! \$\endgroup\$ – Ender Wiggins Apr 4 '13 at 11:41

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