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I'm looking at the W66CP2NQUAFJ from Winbond. It has a couple of pins, namely CK_t_A and CK_c_A. In the datasheet, it says that these are differential pairs, but nowhere does it state which is the positive/negative line.

Does anyone know which is which?

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  • \$\begingroup\$ Memory is standardized so its probably assumed you already know from the standard. \$\endgroup\$
    – DKNguyen
    Commented Nov 25, 2022 at 16:13

2 Answers 2

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"t" stands for "true"; this is the positive (non-inverted) input.

"c" stands for "complement"; this is the negative (inverted) input.

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From Winbonn W66BP6NB / W66CP2NQ 2Gb / 4Gb LPDDR4 data sheet page 5.

Clock: CK_t and CK_c are differential clock inputs. All address, command, and control input signals are sampled on the crossing of the positive edge of CK_t and the negative edge of CK_c. AC timings for CA parameters are referenced to CK. Each channel (A & B) has its own clock pair.

Even if it was not stated there, it is clearly seen from the timing diagrams. From page 86:

enter image description here

From Page 215:

8.3.2.5 Differential Input Cross Point Voltage The cross point voltage of differential input signals (CK_t, CK_c) must meet the requirements in Table 96.

The differential input cross point voltage VIX is measured from the actual cross point of true and complement signals to the mid level.

enter image description here

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  • \$\begingroup\$ This is a good answer, very detailed for the specific part. But, I would rather accept @Jonathan S.'s answer, as it is more generic for memory and just EE in general. \$\endgroup\$ Commented Nov 25, 2022 at 23:11

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