I had been trying to find a way to simulate a PWM signal for a sine wave, other than using a large and cumbersome PWL file, or using a comparator between a sine signal and a sawtooth for the carrier. So I found a post in the AllAboutCircuits forum that provided a voltage-to-PWM function:


I modified it slightly to work with a sine wave, but I found that it did not provide the expected high and low duty cycles at the limits of the sine wave. It is not clear to me why this happens, and I'd like to find a way to get this to work over a wider range of duty cycles. Here are screenshots showing the effect of a slight increase of amplitude which is more than 1.65/2.5 = 66% and 33% duty cycle.

Sine wave PWM - no distortion

And with a little greater amplitude - distortion:

Sine wave PWM - distortion

As @Jonathan suggested, setting a maximum timestep of 100 ns works a treat. I was also able to use a 2 kHz carrier in place of 5 kHz and that also allowed up to 0% to 100% modulation. Even 1 us works, and simulation is much faster.

(edit) In the interest of completeness, here is a successful simulation at 100% modulation and 10 kHz carrier for 50 Hz:

Sine wave PWM - 50 Hz 100% modulation 10 kHz carrier

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    \$\begingroup\$ LTSpice's automatic timestep selection might get confused since the function is not differentiable. Try setting a minimum timestep in your .tran command, i.e. 100ns. \$\endgroup\$ Dec 1, 2022 at 0:40
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    \$\begingroup\$ Yes, that does it. I was also able to use a carrier of 500 us period (2 kHz) for which I can get 0 to 100% modulation, and even a little more, before distortion. Thanks! You can put this as an answer which I will gladly accept. \$\endgroup\$
    – PStechPaul
    Dec 1, 2022 at 0:44
  • \$\begingroup\$ The AllAboutCircuits post also referenced a source of many useful LTspice models and examples, including DC and induction motors: github.com/kanedahiroshi/LTspiceControlLibrary \$\endgroup\$
    – PStechPaul
    Dec 1, 2022 at 1:00

2 Answers 2


The problem here is that LTSpice is unable to differentiate the function of the PWM voltage source. Its differential is zero at any point in time except for those when it switches (at which it's undefined). This trips up LTSpice's automatic timestep calculation, which means that LTSpice advances the simulation too far at once.

The solution is to limit the maximum timestep in the simulation command. This directly influences the maximum PWM error (in the form of random jitter that can get as large as the maximum timestep).


The main problem is that the behavioural sources do not specify a time hint to the solver so, to alleviate the problem, there are two parameters, tripdv and tripdt, which specify that, for any change that happens within the tripdv V or A in tripdt seconds, the engine slows down and ensures that those changes are (reasonably) accurate, whereas outside of that rate, it defaults to "flying mode". You can impose a timestep but, that will slow down everything, all the time. Using tripdv, tripdt is a better alternative.

But the best alternative is to make not use the behavioural source, in favour of the A devices from the [Digital] folder:

A-devices > behavioural sources

The A devices don't have a tripdv parameter (it is assumed 1, default logic output), only tripdt. However, they are far better behaved in switching applications. For brevity, B1, B2 are also shown, beside. The V(xx) and V(yy) outputs are there to show that there is no need for an external filter if the internal settings are used: tau (or Rout/Cout) for A devices, or Rpar/Cpar for behavioural current sources (not voltage).

  • \$\begingroup\$ I noticed that you used ".parma" instead of ".param" for the variable definitions. Is that just an alternate spelling, or something different? Thanks for the additional information. It shows there are many obscure elements to LTspice. \$\endgroup\$
    – PStechPaul
    Dec 1, 2022 at 21:45
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    \$\begingroup\$ @PStechPaul You're not the first one to ask about it so, rather than repeating the words, this was my reply. \$\endgroup\$ Dec 2, 2022 at 14:04

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