Why is my shift register latching in garbage data?

Question

Circuit explanation:

I'm trying to make a circuit which turns button pushes into binary data. The button push slowly discharges a capacitor which then triggers a 555 monostable stable circuit to prevent bouncing. The output of the monostable circuit is then sent into Data_in of the shift register (74HC595). The Register_clock triggers on every falling edge and latches in data that is in the shift_register, which latches in data on the inverse of the register_clock.

Problem: The shift register outputs arbitrary data. It almost appears like the input is floating.

Here is a reddit post demonstrating the current circuit's behaviour.( after swapping out for a 74hc04) https://www.reddit.com/r/beneater/comments/zev60t/does_anyone_know_the_cause_or_fix_for_this_issue/?utm_source=share&utm_medium=web2x&context=3

Answer 1

If your LED connected to the 555 output is illuminating correctly, then the main thing I can see that looks wrong is that your clock inputs and 'data in' on the 74HC595 need swapping over.

As it is wired currently, the data in is debounced, but the clock input isn't, so every button press could clock in several bits. Swapping those inputs will give a clean clock pulse that will clock the correct data in.

Answer 2

Likely multiple reasons.

The 595 is a HC type, and the 04 is an LS type.

The output of LS type chip is incompatible with input of HC type.

The pushbutton circuit is also a problem. First of all it too is not compatible with LS type input, and it has no debouncing.

Easiest fix would be to use a HC04.

For an LS04, the 1k pull-down is too weak. Which is why generally LS type inputs have a pull-up and the pushbutton would just ground the input.

Also to make LS output compatible with HC input, you would put a pull-up resistor to make sure the output high voltage is within HC input limits.

Answer 3

To put a few numbers on @Justme's answer I found a datasheet for each chip: 74HC595 74LS04.

Here we can see that the HC595 can operate at 2-6V supply, and lists its input specifications at 4.5V supply (they will be slightly higher at 5V supply).

• High-level input voltage (V_IH) = 3.15V (min)
• Low-level input voltage (V_IL) = 1.35V (max)

This means that inputs from 0-1.35V are registered as low, 1.35-3.15V as indeterminate (may be low, may be high - no guarantees given), and 3.15-4.5V as high. Again note that these all shift slightly up when supply goes from 4.5V to 5V.

On the other hand, the LS04 requires supply between 4.5V and 5.5V, and lists its specs at 5V supply:

• V_OH = 2,7V (min), 3,4V (typ)
• V_OL = 0,4V (max)

As you can see, the low value is golden - 0,4V max out compared to 1.35V min in.

But the high is a problem: A minimum of 3.15V is required, but the output only promises 2.7V - even if it claims that 3.4V is typical. And this is before we account for the 4.5V <-> 5V supply difference.

The HC595 also list V_IH at 2V and 6V as 1.5V and 4.2V min. If we look at ratios to do a bit of extrapolating, then this happens:

• 1.5/2 = 0,75
• 1.35/4.5 = 0.7
• 4.2/6 = 0.7

This suggests that at 5V supply the min V_IH is at 5V * 0.7 = 3.5V, which is higher than even the typical V_OH of the LS04. Of course, this is only a guess but it does paint a grim picture.

Answer 4

Why is my shift register latching in garbage data?

Answer: Garbage In ... Garbage out

It seems to me you want to make a better switch debounce circuit. Although you could make it a Morse Code binary display on "Dah's" and "Dit's by using the switch duration trailing edge to decode the duration of the switch after it is debounced for 10 ms. Then yank HC04, Q1 and 555.

Let's define the "Dah" as > 150 ms and "Dit" as < 150 or make it X with a single R to control the Morse Code delay threshold..

To debounce to ~20 ms with a button switch bounce time of 5ms use 22 nF and 1Meg or 2.2 nF//10Meg pulldown.

Then use a LPF to define the delay of CLK relative to debounced D. Let LPF RC=T=150 ms then with 50% threshold +/-33% the delay will be roughly 150 ms on the training edge of the buffered inverted switch = CLK . Meaning a short "Dit" CLK's a 0 and a long Dah clocks a 1. Now your binary shift register will display your Morse Code at any repetition rate but active Pulse width modulated when pressed on trailing edge.

Now you use the debounced switch for SI (data) and the decoded delay

I don't know how you can use a switch to clock events with a shift register that is not a counter other than like Morse Code Events. But the leading edge must be filtered to 10ms Thus a "Dit" event is a time window comparator between 10 ms and 150 ms clocked event and anything longer is a "Dah". But this does not decode the Morse Code into characters or counter characters. That's something else.

YOur choice is to define if a Dah = 0 or 1. I would choose 0 as it takes longer to say like Dah.

The SCK or shift clock is your decoded switch delay output rising clock and RCK is the register latch which is just any delay of say > 1 us after rising edge of SCK but < 10 ms. So in total you need 4 caps for charge storage

1. Vdd denoise < 1us
2. Switch denoise < 10ms
3. Morse dah/dit decode > 150 ms
4. RCLK Register latch CLocK

^{simulate this circuit – Schematic created using CircuitLab}

In the meantime, I'll send you a pattern to use.

• • • – – – • • •

Bonus

• ways to send secret messages, check out these eBooks on Hoopla: Codes by Kjartan Poskitt and Codes, Ciphers and Secret Writing by Martin Gardner

A picture is worth a thousand words.

The experts might notice a POR (reset) added RC circuit or if you did, bravo.

Answer 5

Your shift-register clock is driven directly by your pushbutton, with no debouncing. The register may be clocking multiple cycles at a single push.

Use of a gate-pair from a 74C14 in the SR clock path (or other Schmitt triggered gate with hysteresis) may solve your problem.