STM32 Power configuration

Question

I am tring to use a STM32F205ZGT6 MCU (Datasheet). I followed the datasheet as close as possible and made a schematic like below.

I have some questions about the design and why.

Q1

VBAT is connected to a current source but voltage is indicated. I assumed that its connected to VDD (my +3.3V supply). Why is it described like this?

Q2

In the pin layout, there are 12 VDD and 11 VSS. How many decoupling capacitors should I use? Should I match it to the number of VDD or the number of VSS?

Q3

The 100nF decoupling capacitors are connected with a mysterious capacitor of 1uF or 4.7uF. What are these capacitors called and what do they do?

Q4

Some shematics floating in the internet uses inductors between VDD and the capacitors to make a low-pass filter. Is this strictly necessary? If so, what frequency should I set the cutoff to?

Answer 1

A1) It's not a current source. It's a backup battery, a voltage source. If you don't use a backup battery, it must be connected to VDD.

A2) 12, as many pairs of supply pins you have. Even if some have shared ground.

A3) They are decoupling capacitors too and do decoupling. Just for lower frequencies.

A4) They likely are not inductors but ferrite beads. It is strictly not necessary, but they prevent supply noise from other circuits entering the MCU and also they prevent the MCU from causing supply noise to other circuits.

Answer 2

Q1 : VBAT is connected to a current source but voltage is indicated

Weird. Maybe an old french or italian notation (since ST is french-italian)

Q2 : In the pin layout, there are 12 VDD and 11 VSS. How many decoupling capacitors should I use?

It's better to use for each Vdd pin. Be sure to place them as close as possible to the physical pins on your layout.

Q3 : The 100nF decoupling capacitors are connected with a mysterious capacitor of 1uF or 4.7uF. What are these capacitors called and what do they do?

These are also decoupling capacitors but do not serve the same purpose. The 100nF caps allow for a low impedance path for fast I/O transients. While the bigger value caps provide decoupling for slower transients. They can also prevent "Brownouts" by keeping Vdd in the allowed range; things get messy when Vdd is low but not low enough to power down the MCU (but, generally, the watchdog can detect a brownout and freeze the PC).

Q4 : Some shematics floating in the internet uses inductors between VDD and the capacitors to make a low-pass filter. Is this strictly necessary?

Can you update you post with examples?

They can be EMI (ElectroMagnetic Interference) filters. I've never designed an EMI filter between an MCU and its power supply, but I've had designed in other power stages.

They might be necessary in some applications where there is risk of EMI.