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The diodes seem to be reverse biased, which doesn't make sense.

This is from the Olimex Ethernet EVB.

  • 1
    \$\begingroup\$ It might help if you said why do you think they are reverse biased (it does not seem like they are) and what additional circuitry there is that you are not showing to actually provide an answer why the diodes are used the way they are. \$\endgroup\$
    – Justme
    Dec 5, 2022 at 13:23
  • 2
    \$\begingroup\$ Have a look at this answer and its question, may be helpful. \$\endgroup\$
    – TonyM
    Dec 5, 2022 at 13:42
  • \$\begingroup\$ @Justme Sorry yes you are right i understand now. \$\endgroup\$
    – navi
    Dec 5, 2022 at 15:51
  • 1
    \$\begingroup\$ @TonyM YESSSS thanks a lot its clear now. \$\endgroup\$
    – navi
    Dec 5, 2022 at 15:52

2 Answers 2


Why are the diodes used in this fashion for the RX and TX lines? They seem to be reverse biased

  • There will be individual pull-up resistors on the anodes of D3 and D4.

This means that the TXD port can pull the GPIO/U0RXD line down to a zero logic level (via D3) or, if the TXD port is set high, the GPIO/U0RXD line is pulled high by the associated pull-up resistor.

  • Pretty similar story for communicating to the RXD pin via D4.

It could be done this way to prevent multiple devices trying to drive different logic levels to a common/shared line. There could be other reasons of course.


In addition to what Andy aka said it also protects, for example, 3v3 logic from 5v logic due to additional pullup.


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