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I want to built a low noise voltage reference buffer to drive an ADC and additional analog circuits. Main requirements:

  • "Ultra"-Low Noise
  • Best DC accuracy possible (mainly interested in lowest temperature drift possible)
  • Single supply

First step is to filter the reference with an RC filter. This technique is described in an Renesas paper: enter image description here

Even if this circuit filters the voltage reference noise and reduces the DC errors there are still large DC errors when it comes to temperature drift.

ADC Ref-pin drivers (like the LT1012 in picture abouve) should have large slew-rates and low white band noise. Unfortunately, this comes with higher offset voltage drift of the opamp.

In general auto-zero op amps have very high DC accuracy and low offset voltage drift but are too slow to drive the ADC REF pin directly.

A possible solution would be to built a composite amplifier and combine one fast op amp and one auto-zero op amp. I found a example in an TI presentation; enter image description here

Unfortunately I can't find more information/reference circuits featuring a composite amplifier.

Questions;

  • This circuit should provide an active filter with high DC accuracy, right!?
  • What are the downsides of this ciruit and why is this not seen more often?
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  • \$\begingroup\$ Please justify why you need a reference buffer. \$\endgroup\$
    – Andy aka
    Dec 7, 2022 at 13:07
  • \$\begingroup\$ I will use the reference for a radiometric measurement - this means driving the ADC REF pin and as a reference for multiple analog circuits \$\endgroup\$
    – huababua
    Dec 7, 2022 at 13:27
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    \$\begingroup\$ Please justify why a buffer is needed for this. Ratiometric measurements don't normally require excessively accurate references. \$\endgroup\$
    – Andy aka
    Dec 7, 2022 at 13:48
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    \$\begingroup\$ You mean ratiometric rather than radiometric don't you? Stating something is needed doesn't justify why it's needed and, why do you say a buffer is necessary to filter reference? I'm not saying you are wrong but I am saying you haven't justified a buffer yet. I agree filtering might be needed (even on the LTC6655) but why a buffer? \$\endgroup\$
    – Andy aka
    Dec 7, 2022 at 14:24
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    \$\begingroup\$ You don't need a buffer to make a filter. \$\endgroup\$
    – Andy aka
    Dec 7, 2022 at 15:38

1 Answer 1

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I know this question is a year old but if I came across it may others will too.

  1. Will this provide an active filter with high DC accuracy?

    • You have not given enough information to answer the question I believe you meant to ask, which is "is this an appropriate way to drive an ADC reference for my application?". Every real design trades a variety of parameters against each other (size, cost and a slew of performance metrics). You make design choices based on at least tentative requirements for these parameters, but you haven't provided any.

      You need to come up with a specific accuracy requirement for the ADC system as a whole. Its not set in stone, revise it as you go, but you need a number. There are many ways to quantify accuracy, but in my experience THD+N as a function of frequency is the most practical. The domain of the THD+N function is the bandwidth of interest (the frequencies of interest of the signal you will be measuring). SNR and SFDR requirements may also be useful.

    • Specific to the reference buffer, you need to evaluate it across the frequencies of interest. The circuit you've shown is intended to be able to measure signals with much higher frequency content than 100 Hz. If you don't need that bandwidth, there are probably circuits and/or components much more appropriate for you application.

    • What you want to look at with reference buffer circuits is the ADC's sampling behaviour which determines how it will load the reference as well as how sensitive it is to out-of-band noise. If the reference is internally buffered by the ADC it will be different but for unbuffered reference, the required bandwidth of your buffer will be largely determined by the size of the ADC's sampling capacitance and the duration of the capture window. The ADC in the circuit you show, as well as the all of the ADCs I've worked with, is effectively modeled as a switched RC circuit. You need to look at the datasheet to see exactly how this is switched for your ADC. For a differential ADC I would assume that during the sample capture period, the ADC presents a capacitive load to the signal input. Then during the conversion period, it discharges that capacitor into the reference buffer in a series of pulses (probably at the frequency of the provided clock). Knowing this, you can calculate what sort of performance you need from your buffer circuit. What you are really trying to do is present an exceptionally low impedance at the sampling and clock frequencies of the ADC.

  2. What are the downsides of this circuit and why is this not seen more often?

    • The downsides are that it is probably more complicated and expensive than what you need. Many ADCs used for measuring ~100 Hz signals will have adequate on-board buffering such that you do not need an active reference buffer. I've also been told that chopper-amps can inject noise into your supply, but you need to look at the datasheet to evaluate this. You probably will get very respectable performance with a precision reference paired with the appropriately sized ceramic capacitor. You will want to consider the DC bias effect on the capacitor. If the capacitor is too large for the reference to drive satisfactorily, you will need to consider a series resistor (many IC references are spec'd to drive a significant capacitive load without series resistor, refer to ds for output cap vs THD+N @ f). I=C * dv/dt will tell how much ripple will end up on your reference for a particular frequency, amplitude and ratio of filter capacitance to buffer capacitance. If the buffer cap is large enough, the frequency response of the reference is no longer relevant.

    • Or do yourself a favor and find an integrated ADC+AFE, there are many of them for signals around 100 Hz, as inexpensive or high performance as you like.

      I have used a composite buffer circuit like this before, driving a 5msps Sar ADC. I used spice simulations to evaluate buffers. In retrospect, I found that the composite buffer design ends up having a large and complicated layout on the PCB.

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