The circuit is a low-side driver. I currently have the PWM signal set to 5 V with a duty cycle of 50% to achieve an output voltage of 5 V. I know what the overall purpose of the circuit is, but what is the purpose of the NPN transistor (Q1) and PNP transistor (Q2)?

I believe they help charge and discharge the gate of the MOSFET, but I am unsure how.

low-side driver circuit

  • \$\begingroup\$ Try increasing R1 (Rgate = 0) and see how fast V(Gate) moves. Then try increasing Rgate (R1 = 0) and see how fast it moves. Notice a correlation? \$\endgroup\$ Dec 15, 2022 at 6:56
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    \$\begingroup\$ Also, Q2 is probably upside down. \$\endgroup\$ Dec 15, 2022 at 6:56

2 Answers 2


Q2 should have emitter to Q1 emitter and collector grounded.

The transistors are configured as emitter followers.
They have a gain of 1 (and a voltage drop for base to emitter of about 0.6V when on).
But, each transistor has a current gain equal to its Beta or Hfe.
This is typically in the 50 to 300 range depending on devices used.

Input drive sources are often limited in the drive current that they can provide.
The transistors act as "current amplifiers".
For a Beta of say 100, for every 1 mA of input drive they can provide 100 mA of drive to the FET gate.
The result is that the FET gate capacitance is much more rapidly charged or discharged during switching.
This greatly reduces switching times and so decreases switching losses.

Rgate serves two purposes.

  • It sets an upper limit on the gate drive current to prevent extremely fast switching with increased EM radiation.
  • It provides damping of any gate voltage oscillations which are prone to occur during switching.
  • \$\begingroup\$ Tony's answer says much the same as mine but in technically more complex terms. \$\endgroup\$
    – Russell McMahon
    Dec 21, 2022 at 9:44

If you assume a 1st order response to a step input to Gate = Ciss and Rg for FET and transistor with hFE current gain.

Time response

T = (100 +Rg)*Ciss without transistor

T = (100 +Rg/ hFE)* Ciss /hFE with transistor.

oops ... on PNP now your inverted Q2 now has hFE=1 and if Vbe goes >> |-5V| that will "break" it as the skinny little depletion zone has extremely high power density when it has a zener like breakdown.


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