I analysed using three half-adders to add three (same weight) binary digits.
I understood that the third half-adder's and gate will never give an output different from 0 so we used two half-adders and a gate.

I also noticed that the two carries could be (0 and 1 / 1 and 0 / 0 and 0) but they will never be 1 and 1.

My question is why we don't use an XOR gate instead of an OR gate?
this photo clarifies if 3 half-adders

this is where I want the XOR instead of OR gate

XOR instead of OR

  • 1
    \$\begingroup\$ XOR or OR gate where? A schematic would clarify your question. \$\endgroup\$
    – Kartman
    Dec 25, 2022 at 9:32
  • \$\begingroup\$ I edited my question with pictures but unfortunately the comments on the pictures aren't written I am so sorry for this it is the first time to ask on the website \$\endgroup\$ Dec 25, 2022 at 11:14
  • \$\begingroup\$ Please try and tinker with the schematic editor from the post editor tool bar. There even is a half adder… \$\endgroup\$
    – greybeard
    Dec 25, 2022 at 11:23
  • \$\begingroup\$ i added another one to clarify \$\endgroup\$ Dec 25, 2022 at 11:56
  • \$\begingroup\$ (Good job on providing useful descriptions in the image references! And a clear diagram, too…) \$\endgroup\$
    – greybeard
    Dec 25, 2022 at 14:39

1 Answer 1


Logically, OR and EXOR gates are equivalent here.
Trying to build both from NAND or NOR gates, an OR gate looks much simpler needing 3 and 2 gates in 2 levels, respectively, where an EXOR needs 4 resp. 5 in 3 levels.

At the C-MOS/switch level, it doesn't look that bad, but uses 4 transistors/switches more.


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