LTM4612: Power Ground and Signal Ground Planes

Question

I'm trying to figure out how to create the GND layers for a PCB with an LM4612 buck converter module. The datasheet says a bunch of seemingly contradictory things:

• "Place a dedicated power ground layer underneath the unit."
• "Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND to PGND underneath the unit."

Follow this example layout and corresponding schematic:

Here are the contradictions:

1. Even though they say to place a dedicated PGND underneath the unit, what they show in the diagram is a PGND underneath the top and bottom parts of the unit and an SGND underneath the middle part of the unit.

2. When it says "connect the SGND to PGND underneath the unit," doesn't this just turn both SGND and PGND into a single large generic GND layer? If so, why have separate copper at all? Why not just one GND layer covering everything? So, maybe they mean to connect SGND and PGND through a capacitor? (though they certainly don't say this explicitly anywhere)

My questions are about which pieces of advice to follow:

• Should I have two coppers as shown in the PCB diagram, SGND and PGND, and just short them together somewhere not shown in the PCB diagram to make one unified P/S-GND layer?
• Or should I just ignore the PCB diagram and do a single uninterrupted GND layer across the whole PCB without distinguishing SGND from PGND?
• How do PGND and SGND relate to the digital logic GND layer in my circuit? Are these physically separate layers of the PCB? Or just regions on one ultimately unified GND layer in the PCB stack?

Answer 1

If in doubt, see if the part has an evaluation kit (demo board). Often the manufacturer will have the layout in a CAD file format and/or a PDF of the PCB layers. The LTM4612 has a demo board and the design files can be found here (see Design Files zip archive). I have come across layout disparities between the data sheet and the evaluation kit layout in other products. I would rather trust the eval kit layout than the data sheet since the eval kit is an actual working entity.

The key factors are mentioned in Tobalt's post. Reiterating, high current paths must be kept away from the low-level signals such as the feedback resistor (\$R_{FB}\$) return path and, if used, MPGM. You'll see in 1.PDF of the archive that the two SGND pins are joined by a trace and joined to PGND at one point which is away from the high-current switching paths from Vin and Vout.

Also beware of the solder mask (stencil) which is not discussed in the data sheet. Again, the evaluation kit design files can be helpful. In this case, the flooded pads need to be solder mask defined.

Below is a copy of the top layer from the Design Files. The image is rotated 180° to match the orientation of Fig 17 in the data sheet. SGND is highlighted in red. Note that the design files layout is slightly different from Fig 17 in the data sheet.

Answer 2

The idea to provide two netnames to the Ground of this converter is an aid for the designer.

PGND must be layed out tightly with Vin and Vout to have least inductance there. It carries the return currents of Vin and Vout.

SGND is the reference potential for everything else, so it should not be raised/lowered by large power currents through it.

One way to achieve this, is to connect the two as a star ground, i.e. to tie them only at one point. This is suggested in the datasheet, but IMO is often futile: In practise this fails, because the two grounds are tied within the IC and likely elsewhere on the board, so power currents can again travel through the SGND node and vice versa.

Therefore, the more practical strategy is to decide on one "master" ground if you will and make this a continuous plane. This plane will be used by all the return currents on the board. Most of the time, this is no problem. But there are a few exceptions. One is the DC feedback signal of a voltage regulator, which must be precise. To achieve this precision despite various ground plane currents and unknown ground potential, you turn it from a single-ended ground-referenced signal into a differential signal: You route a GND trace in parallel with the FB trace, from the point of load back to the FB/SGND pins.

Answer 3

They just want you returning the control/support components to ground near the SGND pin.

The loops involving Cin and Cout must be short and wide; using planes/pours over inner ground is the best way to do this.